Undo inadvertent commit of experimental modifications to

processors/IA32/bochs/cpu/cpu.cc, [ci skip]

processors/IA32/bochs/cpu/cpu.cc

@@ -144,23 +144,14 @@ void BX_CPU_C::cpu_loop(Bit32u max_instr_count)
 
 no_async_event:
 
-#if COG
-    bxInstruction_c iStorage, *i = &iStorage;
-# if BX_SUPPORT_X86_64
-	if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64)
-	  fetchDecode64((Bit8u *)(RIP + BX_CPU_THIS_PTR eipPageBias), i, 15);
-	else
-# endif
-	  fetchDecode32((Bit8u *)(EIP + BX_CPU_THIS_PTR eipPageBias), i, 15);
-#else
     Bit32u eipBiased = RIP + BX_CPU_THIS_PTR eipPageBias;
 
     if (eipBiased >= BX_CPU_THIS_PTR eipPageWindowSize) {
       prefetch();
       eipBiased = RIP + BX_CPU_THIS_PTR eipPageBias;
     }
 
-# if BX_SUPPORT_ICACHE
+#if BX_SUPPORT_ICACHE
     bx_phy_address pAddr = BX_CPU_THIS_PTR pAddrA20Page + eipBiased;
     bxICacheEntry_c *entry = BX_CPU_THIS_PTR iCache.get_entry(pAddr);
     bxInstruction_c *i = entry->i;
@@ -180,11 +171,10 @@ void BX_CPU_C::cpu_loop(Bit32u max_instr_count)
       serveICacheMiss(entry, eipBiased, pAddr);
       i = entry->i;
     }
-# else
+#else
     bxInstruction_c iStorage, *i = &iStorage;
     fetchInstruction(i, eipBiased);
-# endif // BX_SUPPORT_ICACHE
-#endif // COG
+#endif
 
 #if BX_SUPPORT_TRACE_CACHE
     unsigned length = entry->ilen;
@@ -251,23 +241,14 @@ void BX_CPU_C::cpu_single_step()
   BX_CPU_THIS_PTR EXT = 0;
   BX_CPU_THIS_PTR errorno = 0;
 
-#if COG
-    bxInstruction_c iStorage, *i = &iStorage;
-# if BX_SUPPORT_X86_64
-	if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64)
-	  fetchDecode64((Bit8u *)(RIP + BX_CPU_THIS_PTR eipPageBias), i, 15);
-	else
-# endif
-	  fetchDecode32((Bit8u *)(EIP + BX_CPU_THIS_PTR eipPageBias), i, 15);
-#else
     Bit32u eipBiased = RIP + BX_CPU_THIS_PTR eipPageBias;
 
     if (eipBiased >= BX_CPU_THIS_PTR eipPageWindowSize) {
       prefetch();
       eipBiased = RIP + BX_CPU_THIS_PTR eipPageBias;
     }
 
-# if BX_SUPPORT_ICACHE
+#if BX_SUPPORT_ICACHE
     bx_phy_address pAddr = BX_CPU_THIS_PTR pAddrA20Page + eipBiased;
     bxICacheEntry_c *entry = BX_CPU_THIS_PTR iCache.get_entry(pAddr);
     bxInstruction_c *i = entry->i;
@@ -287,11 +268,10 @@ void BX_CPU_C::cpu_single_step()
       serveICacheMiss(entry, eipBiased, pAddr);
       i = entry->i;
     }
-# else // BX_SUPPORT_ICACHE
+#else // BX_SUPPORT_ICACHE
     bxInstruction_c iStorage, *i = &iStorage;
     fetchInstruction(i, eipBiased);
-# endif // BX_SUPPORT_ICACHE
-#endif // COG
+#endif // BX_SUPPORT_ICACHE
 
 #if BX_SUPPORT_TRACE_CACHE
 # error "COG assumes no BX_SUPPORT_TRACE_CACHE
@@ -697,17 +677,16 @@ unsigned BX_CPU_C::handleAsyncEvent(void)
 //  * ROM boundary:             2k (dont care since we are only reading)
 //  * segment boundary:         any
 
+#if !COG
 void BX_CPU_C::prefetch(void)
 {
-#if !COG
   bx_address laddr = BX_CPU_THIS_PTR get_laddr(BX_SEG_REG_CS, RIP);
   bx_phy_address pAddr;
   unsigned pageOffset = PAGE_OFFSET(laddr);
 
   // Calculate RIP at the beginning of the page.
   BX_CPU_THIS_PTR eipPageBias = pageOffset - RIP;
   BX_CPU_THIS_PTR eipPageWindowSize = 4096;
-#endif
 
 #if BX_SUPPORT_X86_64
   if (Is64BitMode()) {
@@ -729,17 +708,16 @@ void BX_CPU_C::prefetch(void)
     }
   }
 
-#if !COG
   bx_address lpf = LPFOf(laddr);
   unsigned TLB_index = BX_TLB_INDEX_OF(lpf, 0);
   bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[TLB_index];
   Bit8u *fetchPtr = 0;
 
   if ((tlbEntry->lpf == lpf) && !(tlbEntry->accessBits & USER_PL)) {
     pAddr = A20ADDR(tlbEntry->ppf | pageOffset);
-# if BX_SupportGuest2HostTLB
+#if BX_SupportGuest2HostTLB
     fetchPtr = (Bit8u*) (tlbEntry->hostPageAddr);
-# endif
+#endif
   }  
   else {
     if (BX_CPU_THIS_PTR cr0.get_PG()) {
@@ -771,15 +749,15 @@ void BX_CPU_C::prefetch(void)
     }
   }
 
-# if BX_SUPPORT_ICACHE
+#if BX_SUPPORT_ICACHE
   BX_CPU_THIS_PTR currPageWriteStampPtr = pageWriteStampTable.getPageWriteStampPtr(pAddr);
   Bit32u pageWriteStamp = *(BX_CPU_THIS_PTR currPageWriteStampPtr);
   pageWriteStamp &= ~ICacheWriteStampFetchModeMask; // Clear out old fetch mode bits
   pageWriteStamp |=  BX_CPU_THIS_PTR fetchModeMask; // And add new ones
   pageWriteStampTable.setPageWriteStamp(pAddr, pageWriteStamp);
-# endif
-#endif /* !COG */
+#endif
 }
+#endif
 
 void BX_CPU_C::boundaryFetch(const Bit8u *fetchPtr, unsigned remainingInPage, bxInstruction_c *i)
 {