yunsuan, Fpu: switch to new Fpu (#2995)

OpenXiangShan · May 21, 2024 · 90ae5a7 · 90ae5a7
1 parent 60311af
commit 90ae5a7
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Showing 4 changed files with 4 additions and 7 deletions.
diff --git a/src/main/scala/xiangshan/backend/fu/wrapper/FALU.scala b/src/main/scala/xiangshan/backend/fu/wrapper/FALU.scala
@@ -8,8 +8,7 @@ import xiangshan.backend.fu.FuConfig
 import xiangshan.backend.fu.vector.Bundles.VSew
 import xiangshan.backend.fu.fpu.FpPipedFuncUnit
 import yunsuan.{VfaluType, VfpuType}
-import yunsuan.vector.VectorFloatAdder
-import yunsuan.fpulite.FloatAdder
+import yunsuan.fpu.FloatAdder
 
 class FAlu(cfg: FuConfig)(implicit p: Parameters) extends FpPipedFuncUnit(cfg) {
   XSError(io.in.valid && io.in.bits.ctrl.fuOpType === VfpuType.dummy, "falu OpType not supported")

diff --git a/src/main/scala/xiangshan/backend/fu/wrapper/FDivSqrt.scala b/src/main/scala/xiangshan/backend/fu/wrapper/FDivSqrt.scala
@@ -9,8 +9,7 @@ import xiangshan.backend.fu.vector.Bundles.VSew
 import xiangshan.backend.fu.fpu.FpNonPipedFuncUnit
 import xiangshan.backend.rob.RobPtr
 import yunsuan.VfpuType
-import yunsuan.vector.VectorFloatDivider
-import yunsuan.fpulite.FloatDivider
+import yunsuan.fpu.FloatDivider
 
 class FDivSqrt(cfg: FuConfig)(implicit p: Parameters) extends FpNonPipedFuncUnit(cfg) {
   XSError(io.in.valid && io.in.bits.ctrl.fuOpType === VfpuType.dummy, "fdiv OpType not supported")

diff --git a/src/main/scala/xiangshan/backend/fu/wrapper/FMA.scala b/src/main/scala/xiangshan/backend/fu/wrapper/FMA.scala
@@ -8,8 +8,7 @@ import xiangshan.backend.fu.FuConfig
 import xiangshan.backend.fu.vector.Bundles.VSew
 import xiangshan.backend.fu.fpu.FpPipedFuncUnit
 import yunsuan.{VfmaType, VfpuType}
-import yunsuan.vector.VectorFloatFMA
-import yunsuan.fpulite.FloatFMA
+import yunsuan.fpu.FloatFMA
 
 class FMA(cfg: FuConfig)(implicit p: Parameters) extends FpPipedFuncUnit(cfg) {
   XSError(io.in.valid && io.in.bits.ctrl.fuOpType === VfpuType.dummy, "fma OpType not supported")

diff --git a/yunsuan b/yunsuan