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vtype: add valid signal for vsetvl instruction when calculate output
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Ziyue-Zhang committed May 22, 2024
1 parent 96d4617 commit ac41d90
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Showing 5 changed files with 9 additions and 6 deletions.
3 changes: 2 additions & 1 deletion src/main/scala/xiangshan/backend/Backend.scala
Original file line number Diff line number Diff line change
Expand Up @@ -384,7 +384,8 @@ class BackendImp(override val wrapper: Backend)(implicit p: Parameters) extends
csrio.fpu.dirty_fs := ctrlBlock.io.robio.csr.dirty_fs
csrio.vpu <> 0.U.asTypeOf(csrio.vpu) // Todo

val vsetvlVType = intExuBlock.io.vtype.getOrElse(0.U.asTypeOf(new VType))
val fromVsetVType = intExuBlock.io.vtype.getOrElse(0.U.asTypeOf((Valid(new VType))))
val vsetvlVType = RegEnable(fromVsetVType.bits, 0.U.asTypeOf(new VType), fromVsetVType.valid)
ctrlBlock.io.robio.vsetvlVType := vsetvlVType

val debugVconfig = dataPath.io.debugVconfig match {
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2 changes: 1 addition & 1 deletion src/main/scala/xiangshan/backend/exu/ExeUnit.scala
Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,7 @@ class ExeUnitIO(params: ExeUnitParams)(implicit p: Parameters) extends XSBundle
val fenceio = OptionWrapper(params.hasFence, new FenceIO)
val frm = OptionWrapper(params.needSrcFrm, Input(Frm()))
val vxrm = OptionWrapper(params.needSrcVxrm, Input(Vxrm()))
val vtype = OptionWrapper(params.writeVConfig, new VType)
val vtype = OptionWrapper(params.writeVConfig, (Valid(new VType)))
val vlIsZero = OptionWrapper(params.writeVConfig, Output(Bool()))
val vlIsVlmax = OptionWrapper(params.writeVConfig, Output(Bool()))
}
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2 changes: 1 addition & 1 deletion src/main/scala/xiangshan/backend/exu/ExuBlock.scala
Original file line number Diff line number Diff line change
Expand Up @@ -71,7 +71,7 @@ class ExuBlockIO(implicit p: Parameters, params: SchdBlockParams) extends XSBund
val fenceio = OptionWrapper(params.hasFence, new FenceIO)
val frm = OptionWrapper(params.needSrcFrm, Input(Frm()))
val vxrm = OptionWrapper(params.needSrcVxrm, Input(Vxrm()))
val vtype = OptionWrapper(params.writeVConfig, new VType)
val vtype = OptionWrapper(params.writeVConfig, (Valid(new VType)))
val vlIsZero = OptionWrapper(params.writeVConfig, Output(Bool()))
val vlIsVlmax = OptionWrapper(params.writeVConfig, Output(Bool()))
}
2 changes: 1 addition & 1 deletion src/main/scala/xiangshan/backend/fu/FuncUnit.scala
Original file line number Diff line number Diff line change
Expand Up @@ -84,7 +84,7 @@ class FuncUnitIO(cfg: FuConfig)(implicit p: Parameters) extends XSBundle {
val fenceio = OptionWrapper(cfg.isFence, new FenceIO)
val frm = OptionWrapper(cfg.needSrcFrm, Input(UInt(3.W)))
val vxrm = OptionWrapper(cfg.needSrcVxrm, Input(UInt(2.W)))
val vtype = OptionWrapper(cfg.writeVConfig, new VType)
val vtype = OptionWrapper(cfg.writeVConfig, (Valid(new VType)))
val vlIsZero = OptionWrapper(cfg.writeVConfig, Output(Bool()))
val vlIsVlmax = OptionWrapper(cfg.writeVConfig, Output(Bool()))
}
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6 changes: 4 additions & 2 deletions src/main/scala/xiangshan/backend/fu/wrapper/VSet.scala
Original file line number Diff line number Diff line change
Expand Up @@ -76,7 +76,8 @@ class VSetRiWvf(cfg: FuConfig)(implicit p: Parameters) extends VSetBase(cfg) {

out.res.data := vsetModule.io.out.vconfig.vl

if (cfg.writeVConfig) io.vtype.get := vsetModule.io.out.vconfig.vtype
if (cfg.writeVConfig) io.vtype.get.bits := vsetModule.io.out.vconfig.vtype
if (cfg.writeVConfig) io.vtype.get.valid := io.out.valid
if (cfg.writeVConfig) io.vlIsZero.get := vl === 0.U
if (cfg.writeVConfig) io.vlIsVlmax.get := vl === vlmax

Expand Down Expand Up @@ -106,7 +107,8 @@ class VSetRvfWvf(cfg: FuConfig)(implicit p: Parameters) extends VSetBase(cfg) {
out.res.data := Mux(vsetModule.io.out.vconfig.vtype.illegal, 0.U,
Mux(VSETOpType.isKeepVl(in.ctrl.fuOpType), oldVL, vsetModule.io.out.vconfig.vl))

if (cfg.writeVConfig) io.vtype.get := vsetModule.io.out.vconfig.vtype
if (cfg.writeVConfig) io.vtype.get.bits := vsetModule.io.out.vconfig.vtype
if (cfg.writeVConfig) io.vtype.get.valid := io.out.valid
if (cfg.writeVConfig) io.vlIsZero.get := res.vl === 0.U
if (cfg.writeVConfig) io.vlIsVlmax.get := res.vl === vlmax

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