bump yunsuan

[sinceforYy]

1. vfalu: the bit width of vs1[0] is 2*SEW for vfwredosum inst
2. Zvbb: fix vs2,vs1 input according to uopidx for vwsll inst

[XiangShanRobot]

[Generated by IPC robot]
commit: c2b7055

commit	astar	copy_and_run	coremark	gcc	gromacs	lbm	linux	mcf	microbench	milc	namd	povray	wrf	xalancbmk
c2b7055	1.812	0.451	2.047	1.199	2.941	2.507	2.196	0.934	1.373	1.397	3.181	2.669	2.403	2.961

master branch:

commit	astar	copy_and_run	coremark	gcc	gromacs	lbm	linux	mcf	microbench	milc	namd	povray	wrf	xalancbmk
9705db6			2.047				2.196	0.934	1.373			2.669		2.961
78d7c65	1.812	0.451	2.043	1.199	2.941	2.507	2.196	0.934	1.373	1.397	3.181	2.669	2.403	2.961
5c1e8bf	1.812	0.451	2.043	1.199	2.941	2.507	2.196	0.934	1.373	1.397	3.181	2.669	2.403	2.961
7c26eb0	1.809	0.451	2.043	1.190	2.940	2.496	2.197	0.932	1.373	1.411	3.181	2.669	2.403	2.948
1436b76	1.811	0.451	2.047	1.190	2.940	2.496	2.197	0.932	1.373	1.411	3.181	2.669	2.403	2.948
84c44d2	1.809	0.451	2.047	1.190	2.940	2.496	2.197	0.932	1.373	1.411	3.181	2.669	2.403	2.948
9134676	1.809	0.451	2.047	1.190	2.940	2.496	2.197	0.932	1.373	1.411	3.181	2.669	2.403	2.948
7ffbf5f	1.809	0.452	2.052	1.196	2.951	2.499	2.199	0.930	1.377	1.407	3.436	2.653	2.398	2.941
d1da158	1.805	0.452	2.052	1.196	2.951	2.499	2.199	0.930	1.377	1.407	3.436	2.653	2.398	2.941
dd40a82	1.809	0.452	2.052	1.196	2.951	2.499	2.199	0.930	1.377	1.407	3.436	2.653	2.398	2.941