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[HACK] clk: exynos7: Mark sclk_ufsunipro20_user as critical
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Disabling this clock makes whole boot hang when pmic is not yet probed.

Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
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PabloPL committed Oct 19, 2020
1 parent 068db71 commit cbe7004
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion drivers/clk/samsung/clk-exynos7.c
Original file line number Diff line number Diff line change
Expand Up @@ -1056,7 +1056,7 @@ static const struct samsung_div_clock fsys1_div_clks[] __initconst = {
static const struct samsung_gate_clock fsys1_gate_clks[] __initconst = {
GATE(SCLK_UFSUNIPRO20_USER, "sclk_ufsunipro20_user",
"mout_sclk_ufsunipro20_user",
ENABLE_SCLK_FSYS11, 20, 0, 0),
ENABLE_SCLK_FSYS11, 20, CLK_IS_CRITICAL, 0),

GATE(ACLK_MMC1, "aclk_mmc1", "mout_aclk_fsys1_200_user",
ENABLE_ACLK_FSYS1, 29, 0, 0),
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