SoC-NTM (T-DNC/NTM-SoC)

QueenField

Neural Turing Machine for a System on Chip verified with UVM/OSVVM/FV

Name		Name	Last commit message	Last commit date
Latest commit History 1,242 Commits
certification		certification
doc		doc
lifecycle		lifecycle
model		model
opennn @ 71d10da		opennn @ 71d10da
quality		quality
requirements		requirements
rtl		rtl
sim		sim
soc-dv @ 7655f17		soc-dv @ 7655f17
soc-rtos @ 7bc897b		soc-rtos @ 7bc897b
source		source
synthesis/verilog/ntm		synthesis/verilog/ntm
template		template
validation		validation
verification		verification
.gitmodules		.gitmodules
LICENSE		LICENSE
README.md		README.md
icon.jpg		icon.jpg
settings64_ghdl.bat		settings64_ghdl.bat
settings64_iverilog.bat		settings64_iverilog.bat
settings64_msim.bat		settings64_msim.bat
settings64_msim.sh		settings64_msim.sh
settings64_verilator.bat		settings64_verilator.bat
settings64_vivado.bat		settings64_vivado.bat
settings64_vivado.sh		settings64_vivado.sh
settings64_yosys.bat		settings64_yosys.bat
soc-ntm.svg		soc-ntm.svg
submodule.sh		submodule.sh
tag.sh		tag.sh
upload.sh		upload.sh