Base IMXRT1170 port

Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com>

Co-authored-by: David Sidrane <david.sidrane@nscdg.com>

Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>

imxrt:Kconfig fix formatting

imxrt:usbphy move IMXRT_USBPHY{1|[2]}_BASE to memory map

imxrt:lpspi Fix build breakage from adding 1170

imxrt:Finish 1170 iomux and clockconfig versioning

imxrt:Remove duplicate imxrt_clock{off|all}_lpi2c4

imxrt:pmu remove duplicate dcd non 117x header

imxrt:lpspi Fix unused var warnings

imxrt:lpi2c Fix unused var warnings

imxrt:lowputs Fix unused var warnings

imxrt:imxrt117x_dmamux fix duplicate entries

imxtr:serial Use IOMUX_PULL_{UP|DOWN} and map IOMUX V1 to them

imxrt:MPU Support the 1170

imxrt:dmamux Alias IMXRT_DMAMUX0_BASE as IMXRT_DMAMUX_BASE

imx1170:ccm Alias CCM_CCGR_DMA & CCM_CCGR_SNVS_LP for compatiblity

Author: Peter van der Perk <peter.vanderperk@nxp.com>

IMXRT7 Add LPUART 9/10/11/12 support

Author: David Sidrane <david.sidrane@nscdg.com>

imxrt:1170pinmux Add QTIMER pins

imxrt:1170pinmux Add GPT pins

imxrt:1170pinmux Add FLEXPWM pins

imxrt1170:pinmap Add GPIO_ENET_1G pinning

imxrt:enet Support ENET_1G

imxrt:periphclks rt1170 does not have canX_serial clock

imxrt:flexcan:Layer imxrt_ioctl

imxrt117x:memorymap added CAN3

imxrt:ADC support ver1 and ver2 for imxrt117x

imxrt:imxrt117x_ccm Align timer naming with other imxrt QTIMERn->TIMERn

imxrt:imxrt117x_ccm align CCM names with rt106x

imxrt:XBAR support larger number of selects needed on imxrt1170

Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>

FlexSPI AHB Region support, PIT rename for compatiblity

imxrt:USB Analog add VBUS_VALID_3V

FlexSPI expand prefetch registers for IMXRT117X

imxrt:Support Initialization of FlexRam without Running from OCRAM

imxrt: ocotp add UNIQUE_ID register definition

imxrt: enet use ocotp unique_id

imxrt: enet fixes for imxrt117x

imxrt: ethernet pinmux sion enable

imxrt:imxrt_periphclk_configure add memory sync

   Flush the pipeline to prevent bus faults, by insuring a
   peripheral is clocked before being accessed on return from
   this function.

imxrt:Restructure gpioN to padmux mapping

imxrt:Add imxrt1170 daisy

imxrt: correct power modes for imxrt117x fixing hang on WFI

imxrt: imxrt117x TCM MPU config

imxrt: FlexRAM clocking DIV0 setup

imxrt: 117x periphclocks wait for status bit

imxrt: iomucx set pad settings correctly and allow reconfiguration

imxrt: enet align buffers 64-byte for optimal performance

Add DSC barriers for write-through cache support

imxrt: imxrt1170 use FlexCAN FD/ECC features

imxrt:iomuxc_ver2 (117x) SD_B1 and DISP_B1 use PULL feild not PUE/PUS

imxrt:Fix 1170 SNVS addressing

imxrt: enet set mii clock after ifdown so that phy keep working

arch/arm/include/imxrt/chip.h

@@ -77,6 +77,11 @@
 
 #  define IMXRT_OCRAM_SIZE            (1024 * 1024) /* 1024Kb OCRAM */
 #  define IMXRT_GPIO_NPORTS            9            /* Nine total ports */
+
+#elif defined(CONFIG_ARCH_CHIP_MIMXRT1176DVMAA)
+/* MIMXRT1170DVMA TODO
+ */
+#  define IMXRT_GPIO_NPORTS            13           /* Thirteen total ports */
 #else
 #  error "Unknown i.MX RT chip type"
 #endif

arch/arm/include/imxrt/irq.h

@@ -38,6 +38,8 @@
 #  include <arch/imxrt/imxrt105x_irq.h>
 #elif defined(CONFIG_ARCH_FAMILY_IMXRT106x)
 #  include <arch/imxrt/imxrt106x_irq.h>
+#elif defined(CONFIG_ARCH_FAMILY_IMXRT117x)
+#  include <arch/imxrt/imxrt117x_irq.h>
 #else
 #  error Unrecognized i.MX RT architecture
 #endif

arch/arm/src/imxrt/Kconfig

@@ -74,6 +74,11 @@ config ARCH_CHIP_MIMXRT1064CVL5A
 	select ARCH_FAMILY_MIMXRT106xCVL5A
 	select IMXRT_HAVE_LCD
 
+config ARCH_CHIP_MIMXRT1176DVMAA
+	bool "MIMXRT1176DVMAA"
+	select ARCH_FAMILY_IMXRT117x
+	select IMXRT_HAVE_LCD
+
 endchoice # i.MX RT Chip Selection
 
 # i.MX RT Families
@@ -138,7 +143,29 @@ config ARCH_FAMILY_MIMXRT106xCVL5A
 	default n
 	select ARCH_FAMILY_IMXRT106x
 	---help---
-		i.MX RT1056 Crossover Processors for Industrial Products
+		i.MX RT1060 Crossover Processors for Industrial Products
+
+config ARCH_FAMILY_IMXRT117x
+	bool
+	default n
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU # REVISIT
+	select ARMV7M_HAVE_ICACHE
+	select ARMV7M_HAVE_DCACHE
+	select ARMV7M_HAVE_ITCM
+	select ARMV7M_HAVE_DTCM
+	select IMXRT_HIGHSPEED_GPIO
+	select IMXRT_HAVE_FLEXSPI2
+	select IMXRT_ADC_VER2
+	select IMXRT_CLOCKCONFIG_VER2
+	select IMXRT_IOMUX_VER2
+	select IMXRT_HAVE_LPUART9
+	select IMXRT_HAVE_LPUART10
+	select IMXRT_HAVE_LPUART11
+	select IMXRT_HAVE_LPUART12
+	select IMXRT_FLEXCAN_ECC
+	select IMXRT_FLEXCAN1_FD
+	select IMXRT_FLEXCAN2_FD
 
 config ARCH_FAMILY_IMXRT106x
 	bool
@@ -150,6 +177,7 @@ config ARCH_FAMILY_IMXRT106x
 	select ARMV7M_HAVE_ITCM
 	select ARMV7M_HAVE_DTCM
 	select IMXRT_HIGHSPEED_GPIO
+	select IMXRT_HAVE_FLEXSPI2
 
 config IMXRT_HAVE_OTA_PARTITION
 	bool
@@ -206,6 +234,22 @@ config IMXRT_HAVE_LPUART
 	bool
 	default n
 
+config IMXRT_HAVE_LPUART9
+	bool
+	default n
+
+config IMXRT_HAVE_LPUART10
+	bool
+	default n
+
+config IMXRT_HAVE_LPUART11
+	bool
+	default n
+
+config IMXRT_HAVE_LPUART12
+	bool
+	default n
+
 config IMXRT_FLEXCAN
 	bool
 	default n
@@ -240,6 +284,10 @@ config IMXRT_FLEXSPI
 	bool
 	default n
 
+config IMXRT_HAVE_FLEXSPI2
+	bool
+	default n
+
 config IMXRT_ADC
 	bool
 	default n
@@ -260,6 +308,18 @@ config IMXRT_SEMC_INIT_DONE
 	bool
 	default n
 
+config IMXRT_ADC_VER2
+	bool
+	default n
+
+config IMXRT_CLOCKCONFIG_VER2
+	bool
+	default n
+
+config IMXRT_IOMUX_VER2
+	bool
+	default n
+
 menu "i.MX RT Peripheral Selection"
 
 config IMXRT_EDMA
@@ -315,7 +375,7 @@ config FLEXIO1_CLK_PLL4
 config FLEXIO1_CLK_PLL3_PFD2
 	bool "PLL3_PFD2"
 
-if ARCH_FAMILY_IMXRT105x || ARCH_FAMILY_IMXRT106x
+if ARCH_FAMILY_IMXRT105x || ARCH_FAMILY_IMXRT106x || ARCH_FAMILY_IMXRT117x
 
 config FLEXIO1_CLK_PLL5
 	bool "PLL5"
@@ -350,7 +410,7 @@ config FLEXIO1_PODF_DIVIDER
 
 endif # IMXRT_FLEXIO1
 
-if ARCH_FAMILY_IMXRT105x || ARCH_FAMILY_IMXRT106x
+if ARCH_FAMILY_IMXRT105x || ARCH_FAMILY_IMXRT106x || ARCH_FAMILY_IMXRT117x
 
 config IMXRT_FLEXIO2
 	bool "FLEXIO2"
@@ -405,7 +465,7 @@ config FLEXIO2_PODF_DIVIDER
 
 endif # IMXRT_FLEXIO2 || IMXRT_FLEXIO3
 
-if ARCH_FAMILY_IMXRT106x
+if ARCH_FAMILY_IMXRT106x || ARCH_FAMILY_IMXRT117x
 
 config IMXRT_FLEXIO3
 	bool "FLEXIO3"
@@ -477,6 +537,38 @@ config IMXRT_LPUART8
 	select ARCH_HAVE_SERIAL_TERMIOS
 	select IMXRT_HAVE_LPUART
 
+config IMXRT_LPUART9
+	bool "LPUART9"
+	default n
+	select LPUART9_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select IMXRT_HAVE_LPUART
+	depends on IMXRT_HAVE_LPUART9
+
+config IMXRT_LPUART10
+	bool "LPUART10"
+	default n
+	select LPUART10_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select IMXRT_HAVE_LPUART
+	depends on IMXRT_HAVE_LPUART10
+
+config IMXRT_LPUART11
+	bool "LPUART11"
+	default n
+	select LPUART11_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select IMXRT_HAVE_LPUART
+	depends on IMXRT_HAVE_LPUART11
+
+config IMXRT_LPUART12
+	bool "LPUART12"
+	default n
+	select LPUART12_SERIALDRIVER
+	select ARCH_HAVE_SERIAL_TERMIOS
+	select IMXRT_HAVE_LPUART
+	depends on IMXRT_HAVE_LPUART12
+
 endmenu # LPUART Peripherals
 
 menu "LPUART Configuration"
@@ -660,7 +752,7 @@ config IMXRT_FLEXPWM2
 	default n
 	select IMXRT_FLEXPWM
 
-if ARCH_FAMILY_IMXRT105x || ARCH_FAMILY_IMXRT106x
+if ARCH_FAMILY_IMXRT105x || ARCH_FAMILY_IMXRT106x || ARCH_FAMILY_IMXRT117x
 
 config IMXRT_FLEXPWM3
 	bool "FLEXPWM3"
@@ -672,7 +764,7 @@ config IMXRT_FLEXPWM4
 	default n
 	select IMXRT_FLEXPWM
 
-endif # ARCH_FAMILY_IMXRT105x || ARCH_FAMILY_IMXRT106x
+endif # ARCH_FAMILY_IMXRT105x || ARCH_FAMILY_IMXRT106x || ARCH_FAMILY_IMXRT117x
 
 endmenu # FLEXPWM Peripherals
 
@@ -1681,6 +1773,50 @@ config LPI2C4_FILTSDA
 	default 0
 
 endif # IMXRT_LPI2C4
+
+menuconfig IMXRT_LPI2C5
+	bool "LPI2C5"
+	default n
+	select IMXRT_LPI2C
+	depends on ARCH_FAMILY_IMXRT117x
+
+if IMXRT_LPI2C5
+
+config LPI2C5_BUSYIDLE
+	int "Bus idle timeout period in clock cycles"
+	default 0
+
+config LPI2C5_FILTSCL
+	int "I2C master digital glitch filters for SCL input in clock cycles"
+	default 0
+
+config LPI2C5_FILTSDA
+	int "I2C master digital glitch filters for SDA input in clock cycles"
+	default 0
+
+endif # IMXRT_LPI2C5
+
+menuconfig IMXRT_LPI2C6
+	bool "LPI2C6"
+	default n
+	select IMXRT_LPI2C
+	depends on ARCH_FAMILY_IMXRT117x
+
+if IMXRT_LPI2C6
+
+config LPI2C6_BUSYIDLE
+	int "Bus idle timeout period in clock cycles"
+	default 0
+
+config LPI2C6_FILTSCL
+	int "I2C master digital glitch filters for SCL input in clock cycles"
+	default 0
+
+config LPI2C6_FILTSDA
+	int "I2C master digital glitch filters for SDA input in clock cycles"
+	default 0
+
+endif # IMXRT_LPI2C6
 endmenu # LPI2C Peripherals
 
 menu "LPSPI Peripherals"
@@ -1705,6 +1841,20 @@ menuconfig IMXRT_LPSPI4
 	default n
 	select IMXRT_LPSPI
 
+if ARCH_FAMILY_IMXRT117x
+
+menuconfig IMXRT_LPSPI5
+	bool "LPSPI5"
+	default n
+	select IMXRT_LPSPI
+
+menuconfig IMXRT_LPSPI6
+	bool "LPSPI6"
+	default n
+	select IMXRT_LPSPI
+
+endif
+
 endmenu # LPSPI Peripherals
 
 menu "FLEXSPI Peripherals"
@@ -1714,6 +1864,12 @@ menuconfig IMXRT_FLEXSPI1
 	default n
 	select IMXRT_FLEXSPI
 
+menuconfig IMXRT_FLEXSPI2
+	bool "FLEXSPI2"
+	default n
+	select IMXRT_FLEXSPI
+	depends on IMXRT_HAVE_FLEXSPI2
+
 endmenu # FLEXSPI Peripherals
 
 menu "ADC Peripherals"
@@ -1953,7 +2109,7 @@ endif # DEBUG_SENSORS
 
 endif # IMXRT_ENC2
 
-if ARCH_FAMILY_IMXRT105x || ARCH_FAMILY_IMXRT106x
+if ARCH_FAMILY_IMXRT105x || ARCH_FAMILY_IMXRT106x || ARCH_FAMILY_IMXRT117x
 
 menuconfig IMXRT_ENC3
 	bool "ENC3"
@@ -2113,7 +2269,7 @@ endif # DEBUG_SENSORS
 
 endif # IMXRT_ENC4
 
-endif # ARCH_FAMILY_IMXRT105x || ARCH_FAMILY_IMXRT106x
+endif # ARCH_FAMILY_IMXRT105x || ARCH_FAMILY_IMXRT106x || ARCH_FAMILY_IMXRT117x
 
 endmenu # ENC Peripherals
 
@@ -2205,6 +2361,11 @@ config IMXRT_GPIO9_16_31_IRQ
 	default n
 	depends on IMXRT_HIGHSPEED_GPIO
 
+config IMXRT_GPIO13_IRQ
+	bool "GPIO13 Pins 0-31 interrupts"
+	default n
+	depends on ARCH_FAMILY_IMXRT117x
+
 endif # IMXRT_GPIO_IRQ
 
 menu "Ethernet Configuration"
@@ -2278,6 +2439,12 @@ endmenu # IMXRT_ENET
 
 menu "Memory Configuration"
 
+config IMXRT_INIT_FLEXRAM
+	bool "Calls out to the board code to set GPR16-18"
+	---help---
+		Some configuration will need to map flexRAM
+		this must be done prior to data/bss etc init.
+
 config IMXRT_DTCM
 	int "FLEXRAM DTCM Size in K"
 	default 128
@@ -2440,7 +2607,12 @@ config IMXRT_SRAM_HEAPOFFSET
 		Used to reserve memory at the beginning of SRAM for, as an example,
 		a framebuffer.
 
-endmenu # i.MX RT Heap Configuration
+endmenu  # i.MX RT Heap Configuration
+
+config IMXRT_FLEXRAM_PARTITION
+	bool "Set FlexRAM Paritioning"
+	depends on ARCH_FAMILY_IMXRT117x
+
 endmenu # Memory Configuration
 
 menu "LPI2C Configuration"

arch/arm/src/imxrt/Make.defs

@@ -24,16 +24,28 @@ include armv7-m/Make.defs
 
 # Required i.MX RT files
 
-CHIP_CSRCS  = imxrt_allocateheap.c imxrt_start.c imxrt_clockconfig.c
+CHIP_CSRCS  = imxrt_allocateheap.c imxrt_start.c imxrt_periphclks.c
 ifeq ($(CONFIG_IMXRT_PROGMEM),y)
 CHIP_CSRCS += imxrt_flash.c
 endif
-CHIP_CSRCS += imxrt_periphclks.c imxrt_irq.c imxrt_clrpend.c imxrt_gpio.c
-CHIP_CSRCS += imxrt_daisy.c imxrt_wdog.c imxrt_iomuxc.c imxrt_serial.c
+CHIP_CSRCS += imxrt_irq.c imxrt_clrpend.c imxrt_gpio.c
+CHIP_CSRCS += imxrt_daisy.c imxrt_wdog.c imxrt_serial.c
 CHIP_CSRCS += imxrt_xbar.c imxrt_ocotp.c imxrt_lowputc.c
 
 # Configuration-dependent i.MX RT files
 
+ifeq ($(CONFIG_IMXRT_CLOCKCONFIG_VER2),y)
+CHIP_CSRCS += imxrt_clockconfig_ver2.c imxrt_pmu.c
+else
+CHIP_CSRCS += imxrt_clockconfig_ver1.c
+endif
+
+ifeq ($(CONFIG_IMXRT_IOMUX_VER2),y)
+CHIP_CSRCS += imxrt_iomuxc_ver2.c
+else
+CHIP_CSRCS += imxrt_iomuxc_ver1.c
+endif
+
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
 CHIP_CSRCS += imxrt_idle.c
 endif
@@ -120,5 +132,9 @@ CHIP_CSRCS += imxrt_usbdev.c
 endif
 
 ifeq ($(CONFIG_IMXRT_ADC),y)
-CHIP_CSRCS += imxrt_adc.c
+ifeq ($(CONFIG_IMXRT_ADC_VER2),y)
+CHIP_CSRCS += imxrt_adc_ver2.c
+else
+CHIP_CSRCS += imxrt_adc_ver1.c
+endif
 endif