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GPIO Pin Layout #1
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Unless you want to try and map it to like Con1_1 which would correspond to I'm messing with my router as I speak so I can have the bone directly on On Fri, Mar 23, 2012 at 8:29 PM, PlasmaTrout <
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I did the whole PIN8_X thing in the last header I just uploaded. The next issue is that each PIN has 7 mux modes and I need to be able to resolve their mux name to make it work. Bah I'm going to bed. |
How should we do the PIN layouts. Essentially there are two sections P8 and P9 each starting at Pin 1. I think the whole underscore P8_1 thing is a little terse. Maybe we could just take header as a separate argument?
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