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Run logical optimization passes in init stage #11354

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merged 1 commit into from
Dec 1, 2023

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Summary

This commit adds Optimize1qGatesDecomposition and InverseCancellation to the init stage for optimization levels 1, 2, and 3. The optimizations these passes run are completely valid on abstract circuits and do not require target qubits to be selected to run
(Optimize1qGatesDecomposition is noise aware and will perform target aware optimizations if one is provided, but if no target information is reported it will operate correctly for any circuit)

Details and comments

This commit adds Optimize1qGatesDecomposition and InverseCancellation to
the init stage for optimization levels 1, 2, and 3. The optimizations
these passes run are completely valid on abstract circuits and do not
require target qubits to be selected to run
(`Optimize1qGatesDecomposition` is noise aware and will perform target
aware optimizations if one is provided, but if no target information is
reported it will operate correctly for any circuit)
@mtreinish mtreinish added Changelog: None Do not include in changelog mod: transpiler Issues and PRs related to Transpiler labels Nov 30, 2023
@mtreinish mtreinish added this to the 1.0.0 milestone Nov 30, 2023
@mtreinish mtreinish requested a review from a team as a code owner November 30, 2023 19:23
@mtreinish mtreinish added on hold Can not fix yet and removed on hold Can not fix yet labels Nov 30, 2023
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@jakelishman jakelishman left a comment

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In principle I totally agree with doing this. Personally I think that abstract optimisation is / ought to be a sufficiently important step that I'd go as far as wanting a new named stage for it between init and layout, but I can live with it being init at least initially.

Are you sure this doesn't warrant a release note? It doesn't technically affect the public API, but I definitely think it's a change worth drawing attention to - if nothing else, it's a somewhat modification of the obligations of the init stage.

@@ -88,6 +88,44 @@ def pass_manager(self, pass_manager_config, optimization_level=None) -> PassMana
pass_manager_config.unitary_synthesis_plugin_config,
pass_manager_config.hls_config,
)
elif optimization_level in {1, 2}:
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Incredibly minor: there's no reason to use a set here - optimization_level in (1, 2) would technically be more efficient. Not important at all, though.

Comment on lines 160 to 161
else:
return TranspilerError(f"Invalid optimization level {optimization_level}")
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Completely unrelated, but imo this should actually be a ValueError.

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mtreinish commented Nov 30, 2023

Let's add a logical optimization stage. I think it's totally reasonable to break this out into a stage. FWIW, the description and expectations of the init stage is currently:

This stage runs first and is typically used for any initial logical optimization. Because most layout and routing algorithms are only designed to work with 1 and 2 qubit gates, this stage is also used to translate any gates that operate on more than 2 qubits into gates that only operate on 1 or 2 qubits.

which I felt included this. But I think you're right we probably should separate this out form init as it'll make things like doing custom optimizations easier to plug in and not have to worry with gate unrolling or any other circuit preparation.

EDIT: But maybe as a follow up stage because I forgot this will require adding another plugin hook point and extra documentation and stuff which is larger in scope than this change.

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Oh, I totally forgot that we had the bit about logical optimisation in there - I thought we only had the bit about multi-q operators. Sorry! In that case, yeah, let's merge and we can potentially split out the stages in a follow-up.

@jakelishman jakelishman added this pull request to the merge queue Nov 30, 2023
Merged via the queue into Qiskit:main with commit c060638 Dec 1, 2023
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mtreinish added a commit to mtreinish/qiskit-core that referenced this pull request Dec 1, 2023
In Qiskit#11354 we added more logical optimization passes to the preset pass
managers for level 1, 2, and 3 which included the
Optimize1qGatesDecomposition pass. However, this had the the unintended
side effect of tending to normalize circuits to use parameterized gates.
This becomes an issue for discrete basis targets as the basis translator
doesn't always know how to work with those. To avoid issues this commit
removes the pass from the init stage and just saves it for the
optimization loop. If we want to do 1q gate simplification during init
in the future we can develop a different pass that does it in a manner
that wouldn't interfere with discrete basis targets like
Optimize1qGatesDecomposition.
github-merge-queue bot pushed a commit that referenced this pull request Dec 1, 2023
In #11354 we added more logical optimization passes to the preset pass
managers for level 1, 2, and 3 which included the
Optimize1qGatesDecomposition pass. However, this had the the unintended
side effect of tending to normalize circuits to use parameterized gates.
This becomes an issue for discrete basis targets as the basis translator
doesn't always know how to work with those. To avoid issues this commit
removes the pass from the init stage and just saves it for the
optimization loop. If we want to do 1q gate simplification during init
in the future we can develop a different pass that does it in a manner
that wouldn't interfere with discrete basis targets like
Optimize1qGatesDecomposition.
@mtreinish mtreinish deleted the run-logical-opt-all-init branch May 10, 2024 14:14
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