Consective 1q param gates

[rafal-pracht]

Summary

Two or more Pauli rotation gates (Rx, Ry, Rz) that contain the parameters will be combined together.

Details and comments

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[coveralls]

Pull Request Test Coverage Report for Build 2838137906

• 20 of 26 (76.92%) changed or added relevant lines in 3 files are covered.
• 3 unchanged lines in 1 file lost coverage.
• Overall coverage decreased (-0.006%) to 84.039%

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Changes Missing Coverage	Covered Lines	Changed/Added Lines	%
qiskit/circuit/parameterexpression.py	0	6	0.0%

Files with Coverage Reduction	New Missed Lines	%
qiskit/pulse/library/waveform.py	3	89.36%

Totals
Change from base Build 2835258003:	-0.006%
Covered Lines:	56328
Relevant Lines:	67026

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💛 - Coveralls

[Cryoris]

That's a great extension! Does this also collect cases where other single qubit gates are in between Pauli rotations, like RY(a) H RY(b)? And can we extend this to cover other parameterized single qubit gates like P (and ideally also U)?

[alexanderivrii]

This is a nice idea. If I understand correctly, currently the code completely replaces chains of parameterized "rz", "ry", "rx" gates by "optimized" chains. Would it be possible to avoid this replacement if no (or only few) optimizations take place?

[rafal-pracht]

This worked in that way previously. But in the code, the optimization is done by converting the gates to the matrix and multiplying the unitary of the gates. And at the end, the decomposition is done. So before my changes the parameters gates were not optimized.

[alexanderivrii]

I am wondering if the CommutativeCancellation pass also tries to do something similar?

[ajavadia]

Thanks for this. While this takes us a step further in optimizing parametric gates, it is still a bit limited. I opened an issue for a more general workflow: #8192

Another problem with this approach, as I commented below, is that it does not preserve basis gates.

[ajavadia]

if the basis does not contain ry, then ry should not be emitted. This creates a bug as it does not conform to the spec of basis_gates.

[rafal-pracht]

@ajavadia Do you suggest that it should do "merge" of gates only when there are in basis set?

[ajavadia]

Giving a basis means I want my output to be in that basis. So ry should be written as rz + sx here. If basis=None then I think it's fine to emit any gate, including ry itself.

[javabster]

hi @rafal-pracht are you still working on this?