CI: ignore coverage of verilog models

* The verilog components are very long, repetitive and with many
  branches to cover

* The auto-generated code is not on the repo and we cannot see the
  line-by-line coverage

* Narrow down coverage on the qucs-core

.travis.yml

@@ -205,7 +205,7 @@ script:
 after_success:
   # Send coverage data to Coveralls
   - if [[ $GCC ]]; then
-      coveralls --exclude examples --exclude qucs --exclude qucs-doc --exclude adms-2.3.4 --gcov-options '\-lp' --gcov gcov-4.8;
+      coveralls --exclude qucs-core/src/components/verilog --exclude examples --exclude qucs --exclude qucs-doc --exclude adms-2.3.4 --gcov-options '\-lp' --gcov gcov-4.8;
     fi
 
   # Publish HTML into Qucs/qucs-doxygen repo