boards/nucleo-f0xx: use common i2c configuration

RIOT-OS · Jan 2, 2019 · 24bc5ae · 24bc5ae
1 parent 541fc7f
commit 24bc5ae
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Showing 3 changed files with 15 additions and 50 deletions.
diff --git a/boards/common/stm32/include/cfg_i2c1_pb8_pb9.h b/boards/common/stm32/include/cfg_i2c1_pb8_pb9.h
@@ -35,10 +35,15 @@ static const i2c_conf_t i2c_config[] = {
         .speed          = I2C_SPEED_NORMAL,
         .scl_pin        = GPIO_PIN(PORT_B, 8),
         .sda_pin        = GPIO_PIN(PORT_B, 9),
+#if CPU_FAM_STM32F0
+        .scl_af         = GPIO_AF1,
+        .sda_af         = GPIO_AF1,
+#else
         .scl_af         = GPIO_AF4,
         .sda_af         = GPIO_AF4,
+#endif
         .bus            = APB1,
-#if CPU_FAM_STM32F4
+#if CPU_FAM_STM32F4 || CPU_FAM_STM32F2
         .rcc_mask       = RCC_APB1ENR_I2C1EN,
         .clk            = CLOCK_APB1,
         .irqn           = I2C1_EV_IRQn,
@@ -48,14 +53,20 @@ static const i2c_conf_t i2c_config[] = {
 #elif CPU_FAM_STM32F7
         .rcc_mask       = RCC_APB1ENR_I2C1EN,
         .irqn           = I2C1_ER_IRQn,
+#elif CPU_FAM_STM32F0
+        .rcc_mask       = RCC_APB1ENR_I2C1EN,
+        .rcc_sw_mask    = RCC_CFGR3_I2C1SW,
+        .irqn           = I2C1_IRQn,
 #endif
     }
 };
 
-#if CPU_FAM_STM32F4
+#if CPU_FAM_STM32F4 || CPU_FAM_STM32F2
 #define I2C_0_ISR           isr_i2c1_ev
 #elif CPU_FAM_STM32L4 || CPU_FAM_STM32F7
 #define I2C_0_ISR           isr_i2c1_er
+#elif CPU_FAM_STM32F0
+#define I2C_0_ISR           isr_i2c1
 #endif
 
 #define I2C_NUMOF           (sizeof(i2c_config) / sizeof(i2c_config[0]))

diff --git a/boards/nucleo-f070rb/include/periph_conf.h b/boards/nucleo-f070rb/include/periph_conf.h
@@ -24,6 +24,7 @@
 #define PERIPH_CONF_H
 
 #include "periph_cpu.h"
+#include "cfg_i2c1_pb8_pb9.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -151,30 +152,6 @@ static const pwm_conf_t pwm_config[] = {
 #define PWM_NUMOF           (sizeof(pwm_config) / sizeof(pwm_config[0]))
 /** @} */
 
-/**
- * @name I2C configuration
- * @{
- */
-static const i2c_conf_t i2c_config[] = {
-    {
-        .dev            = I2C1,
-        .speed          = I2C_SPEED_NORMAL,
-        .scl_pin        = GPIO_PIN(PORT_B, 8),
-        .sda_pin        = GPIO_PIN(PORT_B, 9),
-        .scl_af         = GPIO_AF1,
-        .sda_af         = GPIO_AF1,
-        .bus            = APB1,
-        .rcc_mask       = RCC_APB1ENR_I2C1EN,
-        .rcc_sw_mask    = RCC_CFGR3_I2C1SW,
-        .irqn           = I2C1_IRQn,
-    }
-};
-
-#define I2C_0_ISR           isr_i2c1
-
-#define I2C_NUMOF           (sizeof(i2c_config) / sizeof(i2c_config[0]))
-/** @} */
-
 /**
  * @name   ADC configuration
  * @{

diff --git a/boards/nucleo-f091rc/include/periph_conf.h b/boards/nucleo-f091rc/include/periph_conf.h
@@ -22,6 +22,7 @@
 #define PERIPH_CONF_H
 
 #include "periph_cpu.h"
+#include "cfg_i2c1_pb8_pb9.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -159,30 +160,6 @@ static const spi_conf_t spi_config[] = {
 #define SPI_NUMOF           (sizeof(spi_config) / sizeof(spi_config[0]))
 /** @} */
 
-/**
- * @name    I2C configuration
- * @{
- */
-static const i2c_conf_t i2c_config[] = {
-    {
-        .dev            = I2C1,
-        .speed          = I2C_SPEED_NORMAL,
-        .scl_pin        = GPIO_PIN(PORT_B, 8),
-        .sda_pin        = GPIO_PIN(PORT_B, 9),
-        .scl_af         = GPIO_AF1,
-        .sda_af         = GPIO_AF1,
-        .bus            = APB1,
-        .rcc_mask       = RCC_APB1ENR_I2C1EN,
-        .rcc_sw_mask    = RCC_CFGR3_I2C1SW,
-        .irqn           = I2C1_IRQn,
-    }
-};
-
-#define I2C_0_ISR           isr_i2c1
-
-#define I2C_NUMOF           (sizeof(i2c_config) / sizeof(i2c_config[0]))
-/** @} */
-
 /**
  * @name    PWM configuration
  * @{