samr21: implemented 32 bit hwtimer

RIOT-OS · Dec 17, 2014 · 7124ec6 · 7124ec6
1 parent 17d2f57
commit 7124ec6
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Showing 4 changed files with 159 additions and 175 deletions.
diff --git a/boards/samr21-xpro/include/board.h b/boards/samr21-xpro/include/board.h
@@ -30,12 +30,12 @@ extern "C" {
 /**
  * Define the nominal CPU core clock in this board
  */
-#define F_CPU               (48000000UL)
+#define F_CPU               (8000000UL)
 
 /**
  * Assign the hardware timer
  */
-#define HW_TIMER            TIMER_0
+#define HW_TIMER            TIMER_1
 
 /**
  * @name Define UART device and baudrate for stdio

diff --git a/boards/samr21-xpro/include/periph_conf.h b/boards/samr21-xpro/include/periph_conf.h
@@ -27,30 +27,23 @@ extern "C" {
  * @name Timer peripheral configuration
  * @{
  */
-#define TIMER_NUMOF         (3U)
-#define TIMER_0_EN          1
-#define TIMER_1_EN          1
-#define TIMER_2_EN          1
+#define TIMER_NUMOF        (2U)
+#define TIMER_0_EN         1
+#define TIMER_1_EN         1
 
 /* Timer 0 configuration */
-#define TIMER_0_DEV         TC3->COUNT16
-#define TIMER_0_CHANNELS    2
-#define TIMER_0_MAX_VALUE   (0xffff)
-#define TIMER_0_ISR         isr_tc3
+#define TIMER_0_DEV        TC3->COUNT16
+#define TIMER_0_CHANNELS   2
+#define TIMER_0_MAX_VALUE  (0xffff)
+#define TIMER_0_ISR        isr_tc3
 
 /* Timer 1 configuration */
-#define TIMER_1_DEV         TC4->COUNT16
-#define TIMER_1_CHANNELS    2
-#define TIMER_1_MAX_VALUE   (0xffff)
-#define TIMER_1_ISR         isr_tc4
-
-/* Timer 2 configuration */
-#define TIMER_2_DEV         TC5->COUNT16
-#define TIMER_2_CHANNELS    2
-#define TIMER_2_MAX_VALUE   (0xffff)
-#define TIMER_2_ISR         isr_tc5
-/** @} */
+#define TIMER_1_DEV        TC4->COUNT32
+#define TIMER_1_CHANNELS   2
+#define TIMER_1_MAX_VALUE  (0xffffffff)
+#define TIMER_1_ISR        isr_tc4
 
+/** @} */
 
 /**
  * @name UART configuration

diff --git a/cpu/samd21/include/hwtimer_cpu.h b/cpu/samd21/include/hwtimer_cpu.h
@@ -27,9 +27,9 @@ extern "C" {
  * @name Hardware timer configuration
  * @{
  */
-#define HWTIMER_MAXTIMERS   2               /**< the CPU implementation supports 2 HW timers */
-#define HWTIMER_SPEED       (124999U)       /**< the HW timer runs with 125kHz */
-#define HWTIMER_MAXTICKS    (0xFFFF)        /**< 16-bit timer */
+#define HWTIMER_MAXTIMERS   2               /**< the CPU implementation supports 1 HW timer */
+#define HWTIMER_SPEED       (1000000U)      /**< the HW timer runs with 1MHz */
+#define HWTIMER_MAXTICKS    (0xFFFFFFFF)    /**< 32-bit timer */
 /** @} */
 
 #ifdef __cplusplus