Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Allow to define reserved fields in CortexM vector table. #13851

Merged
merged 1 commit into from Apr 14, 2020

Conversation

iosabi
Copy link
Contributor

@iosabi iosabi commented Apr 10, 2020

Contribution description

The ARM CortexM vector table has some reserved fields which are used by
some manufacturers to store their custom image information. In
particular, NXP QN908X stores the checksum, Code Read Protection, image
type and boot block pointer in this region.

This patch allows the cpu and board modules to define the value of these
fields at build time by defining a macro.

Testing procedure

Defined CORTEXM_VECTOR_RESERVED_0X20 in the cpu_conf.h of a cpu module, compiled the project and verified that the address 0x20 of the vector table in the .elf file contains this value.

Issues/PRs references

This is part of the FR #13852

The ARM CortexM vector table has some reserved fields which are used by
some manufacturers to store their custom image information. In
particular, NXP QN908X stores the checksum, Code Read Protection, image
type and boot block pointer in this region.

This patch allows the cpu and board modules to define the value of these
fields at build time by defining a macro.
@benpicco benpicco added Area: cpu Area: CPU/MCU ports Type: new feature The issue requests / The PR implemements a new feature for RIOT labels Apr 10, 2020
@benpicco benpicco added CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR and removed CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels Apr 12, 2020
Copy link
Contributor

@benpicco benpicco left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I quickly checked, those are reserved on all Cortex-M cores.
-9 is used by the for the SecureFault interrupt on Cortex-M33 devices with the Security Extension, but those should then not define CORTEXM_VECTOR_RESERVED_0X28.

@benpicco benpicco merged commit b9fda56 into RIOT-OS:master Apr 14, 2020
@iosabi iosabi deleted the vectors_cortexm branch April 14, 2020 21:50
@miri64 miri64 added this to the Release 2020.07 milestone Jun 24, 2020
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Area: cpu Area: CPU/MCU ports CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Type: new feature The issue requests / The PR implemements a new feature for RIOT
Projects
None yet
Development

Successfully merging this pull request may close these issues.

None yet

3 participants