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cpu/cortexm_common: add inlined header only def for irq_% #13999

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merged 3 commits into from May 12, 2020

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fjmolinas
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irq_% are not inlined by the compiler which leads to it branching
to a function that actually implement a single machine instruction.

Inlining these functions makes the call more efficient as well as
saving some bytes in ROM.

This could probably be done for more arch, but I wanted to first do
it for a single arch first.

Testing procedure

  • All applications should still work

  • check footprint difference, BUILD_IN_DOCKER=1 BOARD=<board>make -C examples/gnrc_networking

iotlab-m3 cortexm3:

  • PR
  text    data     bss     dec     hex filename
  87536     184   19240  106960   1a1d0 /data/riotbuild/riotbase/examples/gnrc_networking/bin/iotlab-m3/gnrc_networking.elf
  • master
  text    data     bss     dec     hex filename
  87740     184   19240  107164   1a29c /data/riotbuild/riotbase/examples/gnrc_networking/bin/iotlab-m3/gnrc_networking.elf

samr21-xpro cortexm0:

  • PR
  text    data     bss     dec     hex filename
  91488     184   19240  110912   1b140 /data/riotbuild/riotbase/examples/gnrc_networking/bin/samr21-xpro/gnrc_networking.elf
  • master
  text    data     bss     dec     hex filename
  91588     184   19240  111012   1b1a4 /data/riotbuild/riotbase/examples/gnrc_networking/bin/samr21-xpro/gnrc_networking.elf

nrf52dk cortexm4:

  • PR
  text    data     bss     dec     hex filename
  162048     284   47616  209948   3341c /data/riotbuild/riotbase/examples/gnrc_networking/bin/nrf52dk/gnrc_networking.elf
  • master
  text    data     bss     dec     hex filename
  162248     284   47616  210148   334e4 /data/riotbuild/riotbase/examples/gnrc_networking/bin/nrf52dk/gnrc_networking.elf

Issues/PRs references

Came up a while ago in #11919

@fjmolinas fjmolinas added Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation Platform: ARM Platform: This PR/issue effects ARM-based platforms Area: core Area: RIOT kernel. Handle PRs marked with this with care! labels May 1, 2020
@fjmolinas fjmolinas requested a review from maribu May 1, 2020 07:30
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maribu commented May 1, 2020

This is something I have wanted to see for a long time :-)

It is good to do this one arch at a time. I would also like to see the return value to be lets call it uword_t or irq_state_t, which is 32 bit wide on a 32 bit system, 16 bit on a 16 bit system, and 8 bit wide on a 8 bit platform.

Every platform I am aware of guarantees to disable and restore IRQs in one CPU cycle. As at most a word can be read/written in a cycle, this gives us the word as upper limit for the IRQ state.

The AVR platform would greatly profit if it would be both inlined and word sized, as then the call irq_disable() would translate to one instruction.

(But changing the return type is something that deserves its own PR. Especially as a lot of callers have to be updated.)

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Looks good codewise. I have one suggestion inline. (And maybe you could also sneak in a bugfix? See inline.)

core/include/irq.h Outdated Show resolved Hide resolved
cpu/cortexm_common/include/irq_arch.h Outdated Show resolved Hide resolved
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Rebased.

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Will trigger murdock once to see If I missed an arch.

@fjmolinas fjmolinas added the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label May 4, 2020
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maribu commented May 4, 2020

Code looks good to me. I think you can squash. (Also: The missing #ifdef __cplusplus in cpu/esp_common/include/cpu_conf_common.h can be just squashed in.)

@fjmolinas fjmolinas added CI: disable test cache If set, CI will always run all tests regardless of whether they have been run successfully before CI: run tests If set, CI server will run tests on hardware for the labeled PR CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR and removed CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels May 4, 2020
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Code looks good to me. I think you can squash. (Also: The missing #ifdef __cplusplus in cpu/esp_common/include/cpu_conf_common.h can be just squashed in.)

Squashed. I triggered tests as well for good measure.

@fjmolinas fjmolinas removed the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label May 4, 2020
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fjmolinas commented May 4, 2020

Missed a cpu_conf. Will make sure I'm not missing more before pushing again.

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maribu commented May 11, 2020

I wouldn't mind a second review/ACK here, as this PR has a high impact.

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I wouldn't mind a second review/ACK here, as this PR has a high impact.

Yep I agree!

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@kaspar030 or @bergzand might be able to take a look at this one as well?

@fjmolinas fjmolinas added the Process: needs >1 ACK Integration Process: This PR requires more than one ACK label May 11, 2020
@kaspar030 kaspar030 added this to Backlog / Proposals in RIOT Sprint Day via automation May 12, 2020
@kaspar030 kaspar030 self-assigned this May 12, 2020
@kaspar030 kaspar030 moved this from Backlog / Proposals to Under Review in RIOT Sprint Day May 12, 2020
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Some late comments.

core/include/irq.h Outdated Show resolved Hide resolved
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My ACK is still valid

irq_% are not inlined by the compiler which leads to it branching
to a function that actually implement a single machine instruction.

Inlining these functions makes the call more efficient as well as
saving some bytes in ROM.
__set_PRIMASK(state) had been directly inlined to avoid a hardfault that
occured when branching after waking up from sleep with DBG_STANDBY,
DBG_STOP or DBG_SLEEP set in DBG_CR.

The hardfault occured when returning from the branch to irq_restore,
since the function is now inlined the branch does not happen either.

Refer to RIOT-OS#14015 for more details.
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@fjmolinas fjmolinas added CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR and removed CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels May 12, 2020
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All green again @kaspar030 !

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ACK.

RIOT Sprint Day automation moved this from Under Review to Waiting For Murdock May 12, 2020
@kaspar030 kaspar030 merged commit da2230d into RIOT-OS:master May 12, 2020
RIOT Sprint Day automation moved this from Waiting For Murdock to Done May 12, 2020
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Thanks for the review @kaspar030 @maribu!

@fjmolinas fjmolinas deleted the pr_cortexm_inline_irq branch May 12, 2020 20:02
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maribu commented May 13, 2020

Thanks for the PR. This is huge improvement (at least without LTO) :-)

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Area: core Area: RIOT kernel. Handle PRs marked with this with care! CI: disable test cache If set, CI will always run all tests regardless of whether they have been run successfully before CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Platform: ARM Platform: This PR/issue effects ARM-based platforms Process: needs >1 ACK Integration Process: This PR requires more than one ACK Reviewed: 1-fundamentals The fundamentals of the PR were reviewed according to the maintainer guidelines Reviewed: 2-code-design The code design of the PR was reviewed according to the maintainer guidelines Reviewed: 3-testing The PR was tested according to the maintainer guidelines Reviewed: 4-code-style The adherence to coding conventions by the PR were reviewed according to the maintainer guidelines Reviewed: 5-documentation The documentation details of the PR were reviewed according to the maintainer guidelines Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation
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