cpu/stm32l4: configure and initialize MCO #15064
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Contribution description
This PR extends the STM32L4 clock config/initialization with MCO (microcontroller clock output). This feature allows to output one clock source between LSE, LSI, HSE, HSI, PLLCLK or SYSCLK to a GPIO pin (PA8 with AF0).
This PR makes all possible clock sources usable and also allows to configure the MCO prescaler (among 1, 2, 4, 8, 16, the defaut is 1).
Using one of the MCO clock source will automatically enable the corresponding underlying clock. So for example, it's possible to use HSI as system clock while using the PLLCLK as input clock for MCO.
There's one open question with this PR: does it make sense to configure the MCO pin (PA8/AF0) in stmclk init function (as done in this PR) or should this be left to the responsibility of the developper ?
Testing procedure
To test this PR, one needs a logic analyzer or a scope to verify the clock output on PA8 when MCO is enabled. I'm using a chinese saelae logic analyzer with PulseView on Ubuntu. In this setup, I cannot have a clean measure for clock frequency > 24MHz because my logic analyzer has a maximum sample rate of 48MHz.
Here I provide the output of MCO measured with a nucleo-l412kb, PA8 is available on D9. Any application can be used, so here I'm testing with
examples/hello-world
.MCO: LSE => expected frequency is 32768kHz
MCO: LSI => expected frequency is 32kHz (one can also see that measure are not 100% stable)
MCO: HSI => expected frequency is 16MHz
MCO: HSI (16MHz) + prescaler 16 => expected frequency is 1MHz
MCO: MSI (48MHz) + prescaler 8 => expected frequency is 6MHz
MCO: PLLCLK + HSI used as SYSCLK (16MHz) + prescaler 8 => expected frequency is 10MHz (because PLLCLK is 80MHz by default)
MCO: SYSCLK + HSI used as SYSCLK + prescaler 8 => expected frequency is 2MHz
MCO: SYSCLK + PLL used as SYSCLK (80MHz) + prescaler 8 => expected frequency is 10MHz
Issues/PRs references
This PR is based on #15036 and ticks one item in #14975