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cpu/qn908x: Add timer driver based on CTIMER. #15557
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looks good - does this need any board config?
Ah does't seems so - the timers are always sourced by the same clock - reminds me of lpx23xx
😉
Ah this exposed some bugs/omissions in the watchdog & gpio driver since those tests were previously not build. |
That seems to be the issue.
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you could also chose to not support it and return error when trying to configure it.
stm32 just marks them as not supported and then fails |
GPIO_BOTH gpio_flank_t; UART_PARTY_MARK and UART_PARTY_SPACE in uart_parity_t; and UART_DATA_BITS_5 and UART_DATA_BITS_6 uart_data_bits_t enum values where missing from the periph_cpu.h header since they are not supported by the CPU. This was causing some tests to fail to compile, but only after adding the periph_timer module. This patch adds those missing macros and makes the corresponding functions fail when trying to use them. A minor fix to the NWDT_TIME_LOWER_LIMIT value setting it to 1U to avoid a -Werror=type-limits error in the tests/periph_wdt test. In theory 0 is a totally valid value although a bit useless since it will trigger the WDT right away.
The QN908x CPU has several timer modules: one RTC (Real-Time Clock) that can count from the 32kHz internal clock or 32.768 kHz external clock, four CTIMER that use the APB clock and have four channels each and one SCT timer with up to 10 channels running on the AHB clock. This patch implements a timer driver for the CTIMER blocks only, which is enough to make the xtimer module work. Future patches should improve on this module to support using the RTC CNT2 32-bit free-running counter unit and/or the SCT timer.
I added a second commit (first in the stack) to this pull request that should address gpio, uart and wdt. I see most CPUs treat NWDT_TIME_LOWER_LIMIT as non-inclusive ( |
Contribution description
The QN908x CPU has several timer modules: one RTC (Real-Time Clock) that
can count from the 32kHz internal clock or 32.768 kHz external clock,
four CTIMER that use the APB clock and have four channels each and one
SCT timer with up to 10 channels running on the AHB clock.
This patch implements a timer driver for the CTIMER blocks only, which
is enough to make the xtimer module work. Future patches should improve
on this module to support using the RTC CNT2 32-bit free-running
counter unit and/or the SCT timer.
Testing procedure
./dist/tools/compile_and_test_for_board/compile_and_test_for_board.py . qn9080dk --jobs=1 --with-test-only --applications 'tests/xtimer_*'
Issues/PRs references
This is part of issue #13852.