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sys: add dbgpin
module for debugging and profiling (take 2)
#15931
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dbgpin
module for debugging and profiling (take 2)
Since in #14304 I had already tested AVR and msp430, mind adding those as well (or in follows up), especially since from what I see the differences seem to be almost none (could you point them out to me if there are any important :)) |
@fjmolinas Sure! I was thinking about that, but then wasn't there still an open question with regards to the position of the |
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Done:
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From the PR we had mentioned that fixing the pin initialization for msp430 was out of scope, but do as you prefer. |
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looks good to me, some style suggestions - feel free to ignore
@maribu thanks for the feedback, improved the test app by using |
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Very nice indeed! |
The |
Fix is proposed in #16010 |
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I thought I speed this up a little: I removed including the |
Found and fixed the issue for the kinetis-based boards: The kinetis code is using some macros to map some IRQ names, that differ in some versions of vendor headers, to a RIOT wide unique name. The doxygen of this mapping states, that this mapping must be done before any vendor header is included. Unfortunately, the mapping was so far placed in cpu/kinetis/vectors.c, before any other include statement. In some cases, the vendor headers might be included before the mapping macros in vectors.c, leading to the compilation errors down the line. To fix this, the adaption defines are moved into cpu/kinetis/cpu_conf.h, which is the file that actually includes the vendor headers. This way it is ensured, that these adaption macros are always defined before any vendor header is included, and therefore preventing this kind of error for good.
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after removing the global include I forgot to explicitly include the dbgpin header in the platform specific initialization files the call |
Unrelated failure because of a non-update worker, triggering CI again. |
all green go! |
Contribution description
Successor of #14304
This PR contains a slightly reworked version of the code PRed in #14304:
dbgpin
feature to be providedcortexm
platformsWith these changes the PR is much slimmer now.
Testing procedure
Run the
tests/dbgpin
example on any cortexm board. Either check the output of the default pin (GPIO_PIN(0,0)
) or define alternative pin(s). The output is best observed with a scope o logic analyzer...Issues/PRs references
successor of #14304