cpu/sam0_common: flashpage: disable interrupts while writing #15965
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
benpicco
added
Area: cpu
benpicco
added
the
CI: ready for build
|
What's the state here? Could someone take a look? |
|
Do we have a way to reproduce this ? I don't think the flashpage driver is faulty here, maybe the problem is related to highspeed bus. |
|
So far this only happened on SAM D5x/E5x but it's pretty reliable. |
|
@benpicco is this still happening? |
|
Yes, we've been including this in our downstream branch ever since. |
Teufelchen1
approved these changes
Jan 30, 2024
benpicco
added
CI: ready for build
|
Always happy when I get to shorten this list 😃 |
benpicco
force-pushed
the
cpu/sam0_common/flashpage_irq_disable
branch
from
bb9d5cf
to
a21acf0
Compare
github-actions
bot
added
the
Platform: ARM
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Contribution description
This disabled interrupts while write operations on the internal flash are ongoing.
@firas-hamdi discovered that firmware updates over 802.15.4 with 1024 byte CoAP block size would sometimes (~10% of all updates) trigger a hard fault caused by an Imprecise data access (
IMPRECISERR) on samd51.I failed to re-create this on same54-xpro over Ethernet, so I was wondering if the increased interrupt load due to 6lo fragmentation might have something to do with it.
Testing procedure
I'll try to come up with a setup that triggers this via GPIO interrupts.
Issues/PRs references