Firmware swapping

Makefile.dep

@@ -611,6 +611,12 @@ ifneq (,$(filter vfs,$(USEMODULE)))
     endif
 endif
 
+ifneq (,$(filter fw_slots,$(USEMODULE)))
+  FEATURES_REQUIRED += periph_flashpage
+  FEATURES_REQUIRED += periph_slots
+  USEMODULE += hashes
+endif
+
 # include package dependencies
 -include $(USEPKG:%=$(RIOTPKG)/%/Makefile.dep)
 

Makefile.include

@@ -11,6 +11,7 @@ RIOTBOARD      ?= $(RIOTBASE)/boards
 RIOTPKG        ?= $(RIOTBASE)/pkg
 RIOTPROJECT    ?= $(shell git rev-parse --show-toplevel 2>/dev/null || pwd)
 GITCACHE       ?= $(RIOTBASE)/dist/tools/git/git-cache
+FW_METADATA    ?= $(RIOTBASE)/dist/tools/firmware_metadata
 APPDIR         ?= $(CURDIR)
 BINDIRBASE     ?= $(APPDIR)/bin
 BINDIR         ?= $(BINDIRBASE)/$(BOARD)
@@ -26,6 +27,7 @@ override RIOTBOARD      := $(abspath $(RIOTBOARD))
 override RIOTPKG        := $(abspath $(RIOTPKG))
 override RIOTPROJECT    := $(abspath $(RIOTPROJECT))
 override GITCACHE       := $(abspath $(GITCACHE))
+override FW_METADATA   := $(abspath $(FW_METADATA))
 override APPDIR         := $(abspath $(APPDIR))
 override BINDIRBASE     := $(abspath $(BINDIRBASE))
 override BINDIR         := $(abspath $(BINDIR))
@@ -261,6 +263,10 @@ BASELIBS += $(APPDEPS)
 ELFFILE ?= $(BINDIR)/$(APPLICATION).elf
 HEXFILE ?= $(ELFFILE:.elf=.hex)
 
+ifeq ($(FW_SLOTS),1)
+BINFILE = $(ELFFILE:.elf=.bin)
+endif
+
 # variables used to compile and link c++
 CPPMIX ?= $(if $(wildcard *.cpp),1,)
 
@@ -280,6 +286,12 @@ ifeq ($(BUILDOSXNATIVE),1)
 	$(Q)$(if $(CPPMIX),$(CXX),$(LINK)) $(UNDEF) -o $(ELFFILE) $$(find $(BASELIBS) -size +8c) $(LINKFLAGS) $(LINKFLAGPREFIX)-no_pie
 else
 	$(Q)$(if $(CPPMIX),$(CXX),$(LINK)) $(UNDEF) -o $(ELFFILE) $(LINKFLAGPREFIX)--start-group $(BASELIBS) -lm $(LINKFLAGPREFIX)--end-group  $(LINKFLAGPREFIX)-Map=$(BINDIR)/$(APPLICATION).map $(LINKFLAGPREFIX)--cref $(LINKFLAGS)
+endif
+ifeq ($(FW_SLOTS),1)
+	$(STRIP) --strip-unneeded --strip-debug $(ELFFILE)
+	$(OBJCOPY) -O binary $(ELFFILE) $(BINFILE)
+	$(FW_METADATA)/bin/./generate-metadata $(BINFILE) $(VERSION) $(UUID)
+	srec_cat $(BINFILE) -binary -offset $(FW_METADATA_SPACE) firmware-metadata.bin -binary -o $(BINDIR)/slot-image-$(UUID)-$(VERSION).bin -binary
 endif
 	$(Q)$(SIZE) $(ELFFILE)
 	$(Q)$(OBJCOPY) $(OFLAGS) $(ELFFILE) $(HEXFILE)
@@ -294,6 +306,12 @@ endif # BUILD_IN_DOCKER
 
 ..build-message:
 	@$(COLOR_ECHO) '${COLOR_GREEN}Building application "$(APPLICATION)" for "$(BOARD)" with MCU "$(MCU)".${COLOR_RESET}'
+ifeq ($(FW_SLOTS),1)
+	@$(COLOR_ECHO) '${COLOR_RED}This is a build for FW slot $(FW_SLOT).${COLOR_RESET}'
+endif
+ifeq ($(BOOTLOADER),1)
+	@$(COLOR_ECHO) '${COLOR_RED}This is a Bootloader build.${COLOR_RESET}'
+endif
 	@$(COLOR_ECHO)
 
 # add extra include paths for packages in $(USEMODULE)

cpu/Makefile.include.cortexm_common

@@ -15,6 +15,24 @@ export CFLAGS_OPT  ?= -Os
 export CFLAGS += $(CFLAGS_CPU) $(CFLAGS_LINK) $(CFLAGS_DBG) $(CFLAGS_OPT)
 
 export ASFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG)
+
+# If the FW_SLOTS flag is set, we will generate a linker script at compile-time
+# reflecting the FW_IMAGE_OFFSET and FW_IMAGE_LENGTH values defined in the
+# target project's Makefile.
+ifeq ($(FW_SLOTS),1)
+ifeq ($(FW_SLOT),1)
+LINKER_SCRIPT = $(CPU_MODEL)_slot1.ld
+endif
+ifeq ($(FW_SLOT),2)
+LINKER_SCRIPT = $(CPU_MODEL)_slot2.ld
+endif
+endif
+
+# If we compile a bootloader, set the correct linker script
+ifeq ($(BOOTLOADER),1)
+export LINKER_SCRIPT = $(CPU_MODEL)-bootloader.ld
+endif
+
 export LINKFLAGS += -L$(RIOTCPU)/$(CPU)/ldscripts -L$(RIOTCPU)/cortexm_common/ldscripts
 export LINKER_SCRIPT ?= $(CPU_MODEL).ld
 export LINKFLAGS += -T$(LINKER_SCRIPT) -Wl,--fatal-warnings

cpu/Makefile.include.gnu

@@ -16,3 +16,4 @@ export OBJCOPY = true
 endif
 export OBJDUMP = $(PREFIX)objdump
 export DBG = $(GDBPREFIX)gdb
+export STRIP = $(PREFIX)strip

cpu/stm32f1/Makefile.features

@@ -1 +1,2 @@
 FEATURES_PROVIDED += periph_pm
+FEATURES_PROVIDED += periph_slots

cpu/stm32f1/cpu.c

@@ -96,21 +96,27 @@
 #endif
 #endif
 
+#ifndef FW_SLOTS
 static void clk_init(void);
+#endif
 
 void cpu_init(void)
 {
     /* initialize the Cortex-M core */
     cortexm_init();
+
     /* initialize system clocks */
+#ifndef FW_SLOTS
     clk_init();
+#endif
     /* trigger static peripheral initialization */
     periph_init();
 }
 
 /**
  * @brief Configure the clock system of the stm32f1
  */
+#ifndef FW_SLOTS
 static void clk_init(void)
 {
     /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
@@ -162,3 +168,4 @@ static void clk_init(void)
     while ((RCC->CR & RCC_CR_HSIRDY) != 0) {}
 #endif
 }
+#endif

cpu/stm32f1/include/cpu_conf.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2013 INRIA
+ * Copyright (C) 2013, 2016 Inria
  * Copyright (C) 2014 Freie Universität Berlin
  *
  * This file is subject to the terms and conditions of the GNU Lesser General
@@ -18,6 +18,7 @@
  *
  * @author          Alaeddine Weslati <alaeddine.weslati@intia.fr>
  * @author          Hauke Petersen <hauke.petersen@fu-berlin.de>
+ * @author          Francisco Acosta <francisco.acosta@inria.fr>
  */
 
 #ifndef CPU_CONF_H
@@ -35,13 +36,123 @@
 extern "C" {
 #endif
 
+/**
+ * @brief   Flash page configuration
+ * @{
+ */
+#define FLASHPAGE_SIZE      (2048U)
+
+#if defined(CPU_MODEL_STM32F103CB) || defined(CPU_MODEL_STM32F103RB)
+#define FLASHPAGE_NUMOF     (64U)
+#elif defined(CPU_MODEL_STM32F103RE)
+#define FLASHPAGE_NUMOF     (256U)
+#endif
+/** @} */
+
+/**
+ * @brief   Offset to reset handler on VTOR
+ * @{
+ */
+#define VTOR_RESET_HANDLER     0x4 /** One pointer after the beginning */
+/** @} */
+
+#if defined(CPU_MODEL_STM32F103RE)
+/*
+ * @brief   Flash partitioning for FW slots
+ * @{
+ */
+
+#ifndef FW_METADATA_SPACE
+#define FW_METADATA_SPACE          (0x100)
+#endif
+
+#define MAX_FW_SLOTS               (2)
+#define FW_SLOT_PAGES              (120)
+#define BOOTLOADER_SPACE           (0x4000)
+#define FW_SLOT_SIZE               FLASHPAGE_SIZE * FW_SLOT_PAGES
+#define FW_SLOT_1                  FLASH_BASE + BOOTLOADER_SPACE
+#define FW_SLOT_1_END              FW_SLOT_1 + FW_SLOT_SIZE
+#define FW_SLOT_1_PAGE             (8)
+#define FW_SLOT_2                  FW_SLOT_1_END
+#define FW_SLOT_2_END              FW_SLOT_2 + FW_SLOT_SIZE
+#define FW_SLOT_2_PAGE             (128)
+
+#ifdef FW_SLOTS
+    #if FW_SLOT == 1
+    #define CURRENT_FIRMWARE_ADDR       FW_SLOT_1
+    #define CURRENT_FIRMWARE_PAGE       FW_SLOT_1_PAGE
+    #define CURRENT_FIRMWARE_END        FW_SLOT_1_END
+    #endif
+
+    #if FW_SLOT == 2
+    #define CURRENT_FIRMWARE_ADDR       FW_SLOT_2
+    #define CURRENT_FIRMWARE_PAGE       FW_SLOT_2_PAGE
+    #define CURRENT_FIRMWARE_END        FW_SLOT_2_END
+    #endif
+
+#endif /* FW_SLOTS */
+
+/** @} */
+
+/**
+ * @brief Get FW internal address for a given slot
+ *
+ * @param[in] slot    FW slot
+ *
+ * @return            FW slot address
+ */
+static inline uint32_t get_slot_address(uint8_t slot)
+{
+    switch (slot) {
+        case 1:
+            return FW_SLOT_1;
+            break;
+
+        case 2:
+            return FW_SLOT_2;
+            break;
+    }
+
+    return 0;
+}
+
+/**
+ * @brief Get internal page for a given slot
+ *
+ * @param[in] slot    FW slot
+ *
+ * @return            FW slot page
+ */
+static inline uint32_t get_slot_page(uint8_t slot)
+{
+    switch (slot) {
+        case 1:
+            return FW_SLOT_1_PAGE;
+            break;
+
+        case 2:
+            return FW_SLOT_2_PAGE;
+            break;
+    }
+
+    return 0;
+}
+
+#endif /* defined(CPU_MODEL_STM32F103RE) */
+/** @} */
+
 /**
  * @brief   ARM Cortex-M specific CPU configuration
  * @{
  */
-#define CPU_DEFAULT_IRQ_PRIO            (1U)
-#define CPU_IRQ_NUMOF                   (60U)
-#define CPU_FLASH_BASE                  FLASH_BASE
+#define CPU_DEFAULT_IRQ_PRIO         (1U)
+#define CPU_IRQ_NUMOF                (60U)
+
+#ifdef FW_SLOTS
+#define CPU_FLASH_BASE               (CURRENT_FIRMWARE_ADDR + FW_METADATA_SPACE)
+#else
+#define CPU_FLASH_BASE               FLASH_BASE
+#endif
 /** @} */
 
 /**

cpu/stm32f1/ldscripts/stm32f103re-bootloader.ld

@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2015 Freie Universität Berlin
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @addtogroup      cpu_stm32f1
+ * @{
+ *
+ * @file
+ * @brief           Memory definitions for the STM32F103RE
+ *
+ * @author          Hauke Petersen <hauke.petersen@fu-berlin.de>
+ *
+ * @}
+ */
+
+MEMORY
+{
+    rom (rx)        : ORIGIN = 0x08000000, LENGTH = 16K
+    ram (xrw)       : ORIGIN = 0x20000000, LENGTH = 64K
+    cpuid (r)       : ORIGIN = 0x1ffff7e8, LENGTH = 12
+}
+
+_cpuid_address = ORIGIN(cpuid);
+
+INCLUDE cortexm_base.ld

cpu/stm32f1/ldscripts/stm32f103re_slot1.ld

@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2017 Inria
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @addtogroup      cpu_stm32f1
+ * @{
+ *
+ * @file
+ * @brief           Memory definitions for the STM32F103RE Slot 0
+ *
+ * @author          Francisco Acosta <francisco.acosta@inria.fr>
+ *
+ * @}
+ */
+
+MEMORY
+{
+    rom (rx)        : ORIGIN = 0x08004100, LENGTH = 0x3C000
+    ram (xrw)       : ORIGIN = 0x20000000, LENGTH = 64K
+    cpuid (r)       : ORIGIN = 0x1ffff7e8, LENGTH = 12
+}
+
+_cpuid_address = ORIGIN(cpuid);
+
+INCLUDE cortexm_base.ld

cpu/stm32f1/ldscripts/stm32f103re_slot2.ld

@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2017 Inria
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @addtogroup      cpu_stm32f1
+ * @{
+ *
+ * @file
+ * @brief           Memory definitions for the STM32F103RE Slot 1
+ *
+ * @author          Francisco Acosta <francisco.acosta@inria.fr>
+ *
+ * @}
+ */
+
+MEMORY
+{
+    rom (rx)        : ORIGIN = 0x08040100, LENGTH = 0x3C000
+    ram (xrw)       : ORIGIN = 0x20000000, LENGTH = 64K
+    cpuid (r)       : ORIGIN = 0x1ffff7e8, LENGTH = 12
+}
+
+_cpuid_address = ORIGIN(cpuid);
+
+INCLUDE cortexm_base.ld

dist/tools/firmware_metadata/.gitignore

@@ -0,0 +1,3 @@
+/generate-metadata
+/git-fetch-tweetnacl
+tweetnacl

dist/tools/firmware_metadata/Makefile

@@ -0,0 +1,19 @@
+RIOTBASE := ../../..
+RIOT_INCLUDE = $(RIOTBASE)/sys/include
+SHA256_DIR := $(RIOTBASE)/sys/hashes
+SHA256_INCLUDE := $(RIOT_INCLUDE)/hashes
+METADATA_SRC := generate-metadata.c $(SHA256_DIR)/sha256.c
+METADATA_HDR := $(RIOT_INCLUDE)/fw_slots.h $(RIOT_INCLUDE)/hashes/sha256.h
+
+CFLAGS += -g -O3 -Wall -Wextra -pedantic -std=c99
+
+all: bin bin/generate-metadata
+
+bin:
+	mkdir bin
+
+bin/generate-metadata:
+	$(CC) $(CFLAGS) -I$(RIOT_INCLUDE) $(METADATA_SRC) -o $@
+
+clean:
+	rm -rf bin/generate-metadata