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@ammarwa ammarwa released this 10 Dec 21:53
· 491 commits to amd-master since this release
SWDEV-301543 SWDEV-276146 : Fix profile output buff allocation

L2 flush is triggered by explicit cache flush PM4 packet in aqlprofile
packets to GPU. This cache flush is used to sync up CPU and GPU to make
sure perfomance counters copied to profile output buffer is visible to
CPU. To get rid of this cache flush the followings are done:
  1. This explicit cache flush packet is removed from aqlprofile code
     (another commit to aqlprofile code).
  2. This commit which changed profile output buffer to use kernarg
     memory since it is uncached for GPU.
After these changes profile counter values when copied by GPU to output
buffer they are guaranteed to be visible to CPU.

Change-Id: Ie953949c85fbee2f4369f1de966bcfb33daec084
(cherry picked from commit 2b7993163129d3c2d67eb5e60143237e5276ce0d)