Fixed PMP_CNT sized ports

RoaLogic · Sep 19, 2021 · e5c2809 · e5c2809
1 parent fa09cff
commit e5c2809
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/rtl/verilog/core/riscv_state1.10.sv b/rtl/verilog/core/riscv_state1.10.sv
@@ -92,8 +92,8 @@ module riscv_state1_10 #(
                                         st_tsr,        //trap SRET
   output           [XLEN          -1:0] st_mcounteren,
                                         st_scounteren,
-  output pmpcfg_t                [15:0] st_pmpcfg,
-  output     [15:0][XLEN          -1:0] st_pmpaddr,
+  output pmpcfg_t         [PMP_CNT-1:0] st_pmpcfg,
+  output     [PMP_CNT-1:0][XLEN          -1:0] st_pmpaddr,
 
 
   //interrupts (3=M-mode, 0=U-mode)