Program check not detected when PER trace active

[arfineman]

HHC01413I Hercules version 4.5.0.10830-SDL-g58578601  (i.e. official 4.5 release)

This issue appears to be related to issues #222 and #295. It is of low importance, as it only fails when PER trace is active.

I was able to simplify it to a few instructions.

Here is a sample program:

BAD      START ,
         USING BAD,12
         ST    14,CMSR14
         DC    X'00000000'
         DC    X'00000000'    <----   Add as many as desired
         DC    X'00000000'
         DC    X'00000000'
         SR    15,15
         L     14,CMSR14
         BR    14
CMSR14   DC    F'0'
         END   ,

Here is the results when trace is not active:

 load bad ( start
DMSLIO740I Execution begins...
DMSABE141T Operation exception occurred at 00020006 in routine BAD
CMS

Here is the results with trace active:

 tr inst r 20000.1ff run
Ready; T=0.02/0.04
 load bad ( start
DMSLIO740I Execution begins...
 -> 00020000  ST      50E0C01C >> 0002001C    CC 1
 -> 00020014  SR      1BFF        CC 0
    00020016  L       58E0C01C    0002001C    CC 0
    0002001A  BR      07FE     -> 00F0EAC4    CC 0
Ready; T=0.01/0.01

[Fish-Git]

What of VM are you running? VM/370? z/VM? Which version?

[arfineman]

What of VM are you running? VM/370? z/VM? Which version?

Sorry, I should have mentioned that. It is VM/ESA 2.4. Probably reproducible on z/VM.

It works correctly on 4.2.1. That's why I suspect it is related to issue #222 and #295.

Best regards,

HHC01413I Hercules version 4.2.1.9826-SDL-g9b5cbe3d (4.2.1.9826)
 
CP TR INST R 20000.1FF RUN
 load bad ( start
DMSLIO740I Execution begins...
 -> 00020000  ST      50E0C01C >> 0002001C    CC 1
    00020004  ????    0000
*** 00020004      PROG    0001 -> 0139B5C0        OPERATION
DMSABE141T Operation exception occurred at 00020006 in routine BAD 
CMS

[Fish-Git]

Probably reproducible on z/VM.

Confirmed. Same behavior with z/VM 7.3.

Researching...

[arfineman]

Hi Fish,
This test case and the one for issue #295 work correctly on 4.2.0. It appears the performance fix for issue #222 broke this.
Best regards,

[Fish-Git]

It appears the performance fix for issue #222 broke this.

Nope. What broke things was a careless typo on my part introduced by commit 2dc33fe.

The following patch fixes it:

--- hyperion-git/sie.c	2023-01-18 13:40:14.257956000 -0800
+++ hyperion-1/sie.c	2023-04-09 13:48:25.103666300 -0700
@@ -1483,7 +1483,7 @@
     STATEBK->f = 0;
 
     /* Set the interception code in the SIE block */
-    switch (icode < 0 ? icode : icode & 0xFF)
+    switch (icode < 0 ? icode : icode & 0x7F)
     {
        /* If host interrupt pending, then backup psw so that the SIE
           instruction gets re-executed again to re-enter SIE mode

Fixed by commit 376d445.

Closing.