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Problems with Decelerator prototype v0.2 #2

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5 of 6 tasks
rkujawa opened this issue Dec 9, 2015 · 4 comments
Open
5 of 6 tasks

Problems with Decelerator prototype v0.2 #2

rkujawa opened this issue Dec 9, 2015 · 4 comments

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@rkujawa
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rkujawa commented Dec 9, 2015

Lets use this issue to track problems with PCB design v0.2

  • Provide a way to terminate the _FPUCS by generating _BERR when FPU is absent.
  • Some local bus slot pins are incorrectly numbered (rows 2/3 and 6/7).
  • Provide a way to block _AS/_DS delivery to main board, in case we are decoding the address on a card (not really a problem now, as we just use _RAMSLOT, but in the future we might want to decode it in CPLD).
  • Connect _CIIN to CPLD, without that we can't control cache inhibit and possibly violate timings.
  • Pins 119 and 120 of QFP are mismatched.
  • The PCB has wrong dimensions that potentially conflicts with A3000. The board size should be based on CyberStorm Mk-III/PPC, which is known to be compatible with all existing Amiga models featuring local bus slot.
@rkujawa
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rkujawa commented Dec 12, 2015

Local bus slot pin numbering fixed by @jarob10 commit Sakura-IT/kicad-myparts@5dbb072 .

Pinout correction image

@rkujawa
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rkujawa commented Dec 17, 2015

_BERR generation when FPU is absent and QFP CPU pins mismatch fixed by @jarob10 commit c009a99.

@jarob10
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jarob10 commented Dec 20, 2015

Connect _CIIN to CPLD and add pullup resistors to the Jtag by @jarob10 commit 28ce795.

@jarob10
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jarob10 commented Dec 20, 2015

Fix wrong PCB dimensions in rev0.3 board by @jarob10 commit 6349a9f

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