Skip to content
View SamanMohseni's full-sized avatar
Block or Report

Block or report SamanMohseni

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
SamanMohseni/README.md

👋 Hi, I'm Seyedsaman Mohsenisangtabi (@samanmohseni)
🎓 I recently completed my M.Sc. in Computer Engineering with a focus on Computer Systems' Architecture at Sharif University of Technology
🔍 My research interests include Hardware-Software Codesign, Domain-Specific Accelerator Design, and Memory-Intensive Computation Acceleration
🛠️ I have developed a flexible compressed DNN training framework, capable of training robust DNNs under various constraints, and I am involved in designing hardware architectures optimized for DNN inference and training
📝 I'm excited about the potential of dynamically reconfigurable computing and systematic hardware design
✉️ Feel free to reach out to me at cloud.saman@gmail.com
🔗 Connect with me on LinkedIn: saman-mohseni-3340171bb

Popular repositories Loading

  1. VGA-Simulation VGA-Simulation Public

    A simple VGA monitor simulator to test Verilog models

    C++ 1

  2. FPUSB FPUSB Public

    Custom floating point units implemented in Verilog, tested on a FPGA with interface to a PC over the series of Asynchronous FIFO, FTDI chip, and USB.

    C 1

  3. SamanMohseni SamanMohseni Public

    Config files for my GitHub profile.

  4. AutoMarkov AutoMarkov Public

    A C++ program that, given the description of a Markov model as a state machine, can numerically solve the model and also generate the differential equations in MATLAB.

    C++

  5. CodecPowerEvaluation CodecPowerEvaluation Public

    Verilog implemented of three different codec units and the evaluation of their power consumption using Design Compiler on TSMC 180nm technology.

    Verilog

  6. TorporReplicatoin TorporReplicatoin Public

    Replicates and validates the paper "Energy and power awareness in hardware schedulers for energy harvesting IoT SoCs" using a custom system-level behavioral simulator, developed in C++.

    C++