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os/board/rtl8730e: Update BSP driver irq priority running on cortex-A #6269

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Jul 3, 2024
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8 changes: 4 additions & 4 deletions os/arch/arm/src/amebasmart/amebasmart_serial.c
Original file line number Diff line number Diff line change
Expand Up @@ -584,8 +584,8 @@ static int rtl8730e_log_uart_irq(void *Data)

static int rtl8730e_log_up_attach(struct uart_dev_s *dev)
{
InterruptRegister((IRQ_FUN)rtl8730e_log_uart_irq, RTL8730E_UART_LOG_IRQ-32, (int)NULL, 4);
InterruptEn(RTL8730E_UART_LOG_IRQ-32, 4);
InterruptRegister((IRQ_FUN)rtl8730e_log_uart_irq, RTL8730E_UART_LOG_IRQ-32, (int)NULL, INT_PRI_MIDDLE);
InterruptEn(RTL8730E_UART_LOG_IRQ-32, INT_PRI_MIDDLE);
return 0;
}

Expand Down Expand Up @@ -837,8 +837,8 @@ static int rtl8730e_up_setup(struct uart_dev_s *dev)
if (uart_index_get(priv->tx) == 4) {//Loguart cannot be stopped
irq_disable(RTL8730E_UART_LOG_IRQ-32);
irq_unregister(RTL8730E_UART_LOG_IRQ-32);
InterruptRegister((IRQ_FUN)rtl8730e_log_uart_irq, RTL8730E_UART_LOG_IRQ-32, (int)NULL, 4);
InterruptEn(RTL8730E_UART_LOG_IRQ-32, 4);
InterruptRegister((IRQ_FUN)rtl8730e_log_uart_irq, RTL8730E_UART_LOG_IRQ-32, (int)NULL, INT_PRI_MIDDLE);
InterruptEn(RTL8730E_UART_LOG_IRQ-32, INT_PRI_MIDDLE);
} else {
sdrv[uart_index_get(priv->tx)]->uart_idx = uart_index_get(priv->tx);
serial_init((serial_t *) sdrv[uart_index_get(priv->tx)], priv->tx, priv->rx);
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -64,14 +64,14 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
GPIO_Init(&GPIO_InitStruct);

if (port_num == GPIO_PORT_A) {
InterruptRegister(GPIO_INTHandler, GPIOA_IRQ, (u32)GPIOA_BASE, 5);
InterruptEn(GPIOA_IRQ, 5);
InterruptRegister(GPIO_INTHandler, GPIOA_IRQ, (u32)GPIOA_BASE, INT_PRI_MIDDLE);
InterruptEn(GPIOA_IRQ, INT_PRI_MIDDLE);
} else if (port_num == GPIO_PORT_B) {
InterruptRegister(GPIO_INTHandler, GPIOB_IRQ, (u32)GPIOB_BASE, 5);
InterruptEn(GPIOB_IRQ, 5);
InterruptRegister(GPIO_INTHandler, GPIOB_IRQ, (u32)GPIOB_BASE, INT_PRI_MIDDLE);
InterruptEn(GPIOB_IRQ, INT_PRI_MIDDLE);
} else if (port_num == GPIO_PORT_C) {
InterruptRegister(GPIO_INTHandler, GPIOC_IRQ, (u32)GPIOC_BASE, 5);
InterruptEn(GPIOC_IRQ, 5);
InterruptRegister(GPIO_INTHandler, GPIOC_IRQ, (u32)GPIOC_BASE, INT_PRI_MIDDLE);
InterruptEn(GPIOC_IRQ, INT_PRI_MIDDLE);
}

GPIO_UserRegIrq(GPIO_InitStruct.GPIO_Pin, (VOID *) handler, (VOID *) id);
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -310,8 +310,8 @@ u32 rtc_set_alarm(alarm_t *alrm, alarm_irq_handler alarmHandler)
RTC_SetAlarm(RTC_Format_BIN, &RTC_AlarmStruct_temp);

RTC_AlarmCmd(ENABLE);
InterruptRegister((IRQ_FUN)rtc_alarm_intr_handler, RTC_IRQ, (u32)alrm, 5);
InterruptEn(RTC_IRQ, 5);
InterruptRegister((IRQ_FUN)rtc_alarm_intr_handler, RTC_IRQ, (u32)alrm, INT_PRI_MIDDLE);
InterruptEn(RTC_IRQ, INT_PRI_MIDDLE);

return _TRUE;
}
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -471,8 +471,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
UART_StructInit(&puart_adapter->UART_InitStruct);
UART_Init(puart_adapter->UARTx, &puart_adapter->UART_InitStruct);

InterruptRegister((IRQ_FUN)uart_irqhandler, puart_adapter->IrqNum, (u32)puart_adapter, 5);
InterruptEn(puart_adapter->IrqNum, 5);
InterruptRegister((IRQ_FUN)uart_irqhandler, puart_adapter->IrqNum, (u32)puart_adapter, INT_PRI_MIDDLE);
InterruptEn(puart_adapter->IrqNum, INT_PRI_MIDDLE);

#ifdef CONFIG_MBED_ENABLED
// For stdio management
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -56,6 +56,8 @@ typedef struct {

/* mbed var */
u32 dma_en;

bool is_readwrite;
} HAL_SSI_ADAPTOR, *PHAL_SSI_ADAPTOR;

HAL_SSI_ADAPTOR ssi_adapter_g[2];
Expand Down Expand Up @@ -269,7 +271,7 @@ static u32 ssi_dma_tx_irq(void *Data)
GDMA_Cmd(GDMA_InitStruct->GDMA_Index, GDMA_InitStruct->GDMA_ChNum, DISABLE);

/* Call user TX complete callback */
if (NULL != ssi_adapter->TxCompCallback) {
if (NULL != ssi_adapter->TxCompCallback && ssi_adapter->is_readwrite) {
ssi_adapter->TxCompCallback(ssi_adapter->TxCompCbPara);
}

Expand Down Expand Up @@ -1023,6 +1025,7 @@ int32_t spi_master_read_stream_dma(spi_t *obj, char *rx_buffer, uint32_t length)
#ifdef USE_DMA_WRITE_MASTER_READ
// TX DMA is on already, so use DMA to TX data
// Make the GDMA to use the rx_buffer too
ssi_adapter->is_readwrite = 0;

ret = ssi_dma_send(ssi_adapter, (u8 *) rx_buffer, length);
if (ret != _TRUE) {
Expand Down Expand Up @@ -1097,6 +1100,7 @@ int32_t spi_master_write_read_stream_dma(spi_t *obj, char *tx_buffer,
}

obj->state |= SPI_STATE_TX_BUSY;
ssi_adapter->is_readwrite = 1;
ret = ssi_dma_send(ssi_adapter, (u8 *) tx_buffer, length);
if (ret != _TRUE) {
obj->state &= ~SPI_STATE_TX_BUSY;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -144,8 +144,8 @@ void watchdog_refresh(void)
void watchdog_irq_init(wdt_irq_handler handler, uint32_t id)
{
WDG_ClearINT(WDGDev, WDG_BIT_EIC);
InterruptRegister((IRQ_FUN)handler, WdgIrqNum, (u32)id, 3);
InterruptEn(WdgIrqNum, 3);
InterruptRegister((IRQ_FUN)handler, WdgIrqNum, (u32)id, INT_PRI_HIGH);
InterruptEn(WdgIrqNum, INT_PRI_HIGH);
WDG_INTConfig(WDGDev, WDG_BIT_EIE, ENABLE);
}
/**
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -1100,7 +1100,7 @@ BOOL AUDIO_SP_TXGDMA_Init(
assert_param(GDMA_InitStruct != NULL);
DCache_CleanInvalidate((u32)pTXData, Length);
/*obtain a DMA channel and register DMA interrupt handler*/
GdmaChnl = GDMA_ChnlAlloc(0, CallbackFunc, (u32)CallbackData, INT_PRI_MIDDLE);
GdmaChnl = GDMA_ChnlAlloc(0, CallbackFunc, (u32)CallbackData, INT_PRI_HIGH);
if (GdmaChnl == 0xFF) {
// No Available DMA channel
return _FALSE;
Expand Down Expand Up @@ -1312,7 +1312,7 @@ BOOL AUDIO_SP_LLPTXGDMA_Init(
u32 pTxData = Lli[0].LliEle.Sarx;

/*obtain a DMA channel and register DMA interrupt handler*/
GdmaChnl = GDMA_ChnlAlloc(0, CallbackFunc, (u32)CallbackData, INT_PRI_MIDDLE);
GdmaChnl = GDMA_ChnlAlloc(0, CallbackFunc, (u32)CallbackData, INT_PRI_HIGH);
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Why are we increasing the priority of dma irq? What effect will this have?

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This is used by I2S DMA, which is for audio TX (ie. Bixby app). I tried to increase this to see whether there is performance improvement..

if (GdmaChnl == 0xFF) {
// No Available DMA channel
return _FALSE;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -123,8 +123,8 @@ void RTIM_TimeBaseInit(RTIM_TypeDef *TIM, RTIM_TimeBaseInitTypeDef *TIM_InitStru

/* Initial TimerIRQHandle */
if (UserCB) {
InterruptRegister(UserCB, IrqNum, UserCBData, 3);
InterruptEn(IrqNum, 3);
InterruptRegister(UserCB, IrqNum, UserCBData, INT_PRI_HIGH);
InterruptEn(IrqNum, INT_PRI_HIGH);
}

/* Generate an update event */
Expand Down
2 changes: 1 addition & 1 deletion os/board/rtl8730e/src/rtl8730e_mipi_lcdc.c
Original file line number Diff line number Diff line change
Expand Up @@ -89,7 +89,7 @@ static u8 lcdc_nextframe = 0;
struct irq lcdc_irq_info = {
.num = LCDC_IRQ,
.data = (u32) LCDC,
.priority = INT_PRI_MIDDLE,
.priority = INT_PRI_HIGH,
};

extern struct irq mipi_irq_info;
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Do we need to increase the priority of mipi also? It is currently set to middle.

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MIPI irq is only used during sending init command table. When running LCD app, only LCD irq is being applied.

Expand Down