Merge a725e20 into dd8d65f

SiLab-Bonn · Jul 17, 2019 · 47e4992 · 47e4992
2 parents dd8d65f + a725e20
commit 47e4992
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Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/basil/HL/JtagGpio.py b/basil/HL/JtagGpio.py
@@ -40,7 +40,7 @@ class JtagGpio(HardwareLayer):
     def __init__(self, intf, conf):
         super(JtagGpio, self).__init__(intf, conf)
 
-        cfg = yaml.load(self.jtag_gpio_yaml)
+        cfg = yaml.safe_load(self.jtag_gpio_yaml)
         self.reg = StdRegister(driver=None, conf=cfg)
 
         # self.RESETB = 0

diff --git a/basil/RL/RegisterLayer.py b/basil/RL/RegisterLayer.py
@@ -5,7 +5,7 @@
 # ------------------------------------------------------------
 #
 
-from collections import Callable
+from collections.abc import Callable
 
 from basil.dut import Base