Restyle [SiWx917] Added fixes for 917 SoC timer issue #199
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May 10, 2024
* changed pll clk frequency to 40mhz and reconfiguring systick clock * Added reference clock to 40MHZ * added comments * Restyle [SiWx917] Added fixes for 917 SoC timer issue (#199) Restyled by clang-format Co-authored-by: Restyled.io <commits@restyled.io> * Removed header file as it is not needed --------- Co-authored-by: bhmanda <bhmanda@silabs.com> Co-authored-by: restyled-io[bot] <32688539+restyled-io[bot]@users.noreply.github.com> Co-authored-by: Restyled.io <commits@restyled.io>
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Automated style fixes for #198, created by Restyled.
The following restylers made fixes:
To incorporate these changes, merge this Pull Request into the original. We
recommend using the Squash or Rebase strategies.
NOTE: As work continues on the original Pull Request, this process will
re-run and update (force-push) this Pull Request with updated style fixes as
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