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Builds with esp-quick-toolchain. Remember to patch pgmspace.h asm -…
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…> `__asm__`.
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mikee47 committed Aug 29, 2019
1 parent 841974f commit cee146a
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Showing 9 changed files with 39 additions and 57 deletions.
2 changes: 2 additions & 0 deletions Sming/Arch/Esp8266/Components/gdbstub/component.mk
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,8 @@ COMPONENT_DEPENDS := esp8266
COMPONENT_APPCODE := appcode
COMPONENT_INCDIRS := . $(ARCH_COMPONENTS)/driver

APP_CFLAGS += -Wno-attribute-alias -Wno-missing-attributes

ifeq ($(ENABLE_GDB), 1)
COMPONENT_APPCODE += .
CUSTOM_TARGETS += gdb_symbols
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16 changes: 16 additions & 0 deletions Sming/Arch/Esp8266/Components/gdbstub/gdbstub-internal.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,22 @@

#pragma once

#define XCHAL_CP0_SA_SIZE 0
#define XCHAL_CP0_SA_ALIGN 1
#define XCHAL_CP1_SA_SIZE 0
#define XCHAL_CP1_SA_ALIGN 1
#define XCHAL_CP2_SA_SIZE 0
#define XCHAL_CP2_SA_ALIGN 1
#define XCHAL_CP3_SA_SIZE 0
#define XCHAL_CP3_SA_ALIGN 1
#define XCHAL_CP4_SA_SIZE 0
#define XCHAL_CP4_SA_ALIGN 1
#define XCHAL_CP5_SA_SIZE 0
#define XCHAL_CP5_SA_ALIGN 1
#define XCHAL_CP6_SA_SIZE 0
#define XCHAL_CP6_SA_ALIGN 1
#define XCHAL_CP7_SA_SIZE 0
#define XCHAL_CP7_SA_ALIGN 1
#include "xtensa/xtruntime-frames.h"
#include "gdbstub-cfg.h"

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6 changes: 3 additions & 3 deletions Sming/Arch/Esp8266/Components/spi_flash/flashmem.c
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,7 @@ extern char _flash_code_end[];
#define IS_ALIGNED(x) (((uint32_t)(x)&0x00000003) == 0)

// Buffers need to be word aligned for flash access
#define __aligned __attribute__((aligned(4)))
#define attr_aligned __attribute__((aligned(4)))

// If this module were in C++ we could use std::min
static inline uint32_t min(uint32_t a, uint32_t b)
Expand All @@ -48,7 +48,7 @@ uint32_t flashmem_write(const void* from, uint32_t toaddr, uint32_t size)
const uint32_t blksize = INTERNAL_FLASH_WRITE_UNIT_SIZE;
const uint32_t blkmask = INTERNAL_FLASH_WRITE_UNIT_SIZE - 1;

__aligned char tmpdata[FLASH_BUFFERS * INTERNAL_FLASH_WRITE_UNIT_SIZE];
attr_aligned char tmpdata[FLASH_BUFFERS * INTERNAL_FLASH_WRITE_UNIT_SIZE];
const uint8_t* pfrom = (const uint8_t*)from;
uint32_t remain = size;

Expand Down Expand Up @@ -120,7 +120,7 @@ uint32_t flashmem_read(void* to, uint32_t fromaddr, uint32_t size)
const uint32_t blksize = INTERNAL_FLASH_READ_UNIT_SIZE;
const uint32_t blkmask = INTERNAL_FLASH_READ_UNIT_SIZE - 1;

__aligned char tmpdata[FLASH_BUFFERS * INTERNAL_FLASH_READ_UNIT_SIZE];
attr_aligned char tmpdata[FLASH_BUFFERS * INTERNAL_FLASH_READ_UNIT_SIZE];
uint8_t* pto = (uint8_t*)to;
uint32_t remain = size;

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3 changes: 2 additions & 1 deletion Sming/Arch/Esp8266/app.mk
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@
LIBS += \
microc \
microgcc \
c \
stdc++ \
hal \
$(LIBMAIN)
Expand All @@ -22,7 +23,7 @@ LDFLAGS += \
.PHONY: application
application: $(CUSTOM_TARGETS) $(FW_FILE_1) $(FW_FILE_2)

LIBDIRS += $(SDK_LIBDIR)
LIBDIRS += $(SDK_LIBDIR) $(ESP_HOME)/xtensa-lx106-elf/lib

# $1 -> Linker script
define LinkTarget
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3 changes: 2 additions & 1 deletion Sming/Arch/Esp8266/build.mk
Original file line number Diff line number Diff line change
Expand Up @@ -38,7 +38,8 @@ GDB := $(TOOLSPEC)gdb
CFLAGS_COMMON += \
-nostdlib \
-mlongcalls \
-mtext-section-literals
-mtext-section-literals \
-I$(ESP_HOME)/xtensa-lx106-elf/include

CFLAGS += \
-D__ets__ \
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2 changes: 1 addition & 1 deletion Sming/System/include/sming_attr.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@

#pragma once

#define __packed __attribute__((packed))
//#define __packed __attribute__((packed))
#define __forceinline __attribute__((always_inline)) inline

// Weak attributes don't work for PE
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5 changes: 5 additions & 0 deletions Sming/Wiring/BitManipulations.h
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,8 @@
#define bitClear(value, bit) ((value) &= ~(1UL << (unsigned)(bit)))
#define bitWrite(value, bit, bitvalue) (bitvalue ? bitSet(value, bit) : bitClear(value, bit))

#if 0

#define _SFR_MEM_ADDR(sfr) ((uint32_t) &(sfr)) // 32 Bit!
#define _SFR_ADDR(sfr) _SFR_MEM_ADDR(sfr)

Expand All @@ -39,3 +41,6 @@
#define bit_is_clear(sfr, bit) (!(_SFR_BYTE(sfr) & _BV(bit)))
#define loop_until_bit_is_set(sfr, bit) do { } while (bit_is_clear(sfr, bit))
#define loop_until_bit_is_clear(sfr, bit) do { } while (bit_is_set(sfr, bit))

#endif

5 changes: 4 additions & 1 deletion Sming/Wiring/FakePgmSpace.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,8 @@

#ifdef ICACHE_FLASH

/*
void *memcpy_P(void *dest, const void *src_P, size_t length)
{
// Yes, it seems dest must also be aligned
Expand Down Expand Up @@ -68,7 +70,6 @@ int strcmp_P(const char *str1, const char *str2_P)
return *(unsigned char *)str1 < (unsigned char)pgm_read_byte(str2_P) ? -1 : 1;
}

int strncmp_P(const char *str1, const char *str2_P, const size_t size)
{
for (unsigned i=0; *str1 == pgm_read_byte(str2_P); str1++, str2_P++, i++) {
Expand Down Expand Up @@ -127,6 +128,8 @@ char* strcat_P(char* dest, const char* src_P)
return dest;
}
*/

#endif /* ICACHE_FLASH */


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54 changes: 4 additions & 50 deletions Sming/Wiring/FakePgmSpace.h
Original file line number Diff line number Diff line change
Expand Up @@ -60,46 +60,7 @@ typedef uint32_t prog_uint32_t;
#define PROGMEM __attribute__((aligned(4))) __attribute__((section(".irom.text")))
#endif

// flash memory must be read using 32 bit aligned addresses else a processor exception will be triggered
// order within the 32 bit values are
// --------------
// b3, b2, b1, b0
// w1, w0

#define pgm_read_with_offset(addr, res) \
__asm__("extui %0, %1, 0, 2\n" /* Extract offset within word (in bytes) */ \
"sub %1, %1, %0\n" /* Subtract offset from addr, yielding an aligned address */ \
"l32i.n %1, %1, 0x0\n" /* Load word from aligned address */ \
"slli %0, %0, 3\n" /* Mulitiply offset by 8, yielding an offset in bits */ \
"ssr %0\n" /* Prepare to shift by offset (in bits) */ \
"srl %0, %1\n" /* Shift right; now the requested byte is the first one */ \
: "=r"(res), "=r"(addr) \
: "1"(addr) \
:);

static inline uint8_t pgm_read_byte_inlined(const void* addr)
{
register uint32_t res;
pgm_read_with_offset(addr, res);
return (uint8_t)res; /* This masks the lower byte from the returned word */
}

/* Although this says "word", it's actually 16 bit, i.e. half word on Xtensa */
static inline uint16_t pgm_read_word_inlined(const void* addr)
{
register uint32_t res;
pgm_read_with_offset(addr, res);
return (uint16_t)res; /* This masks the lower half-word from the returned word */
}

// Make sure, that libraries checking existence of this macro are not failing
#define pgm_read_byte(addr) pgm_read_byte_inlined(addr)
#define pgm_read_word(addr) pgm_read_word_inlined(addr)

// No translation necessary (provided address is aligned)
#define pgm_read_dword(addr) (*(const unsigned long*)(addr))
#define pgm_read_float(addr) (*(const float*)(addr))

/*
void *memcpy_P(void *dest, const void *src_P, size_t length);
int memcmp_P(const void *a1, const void *b1, size_t len);
size_t strlen_P(const char * src_P);
Expand All @@ -125,6 +86,8 @@ char *strstr_P(char *haystack, const char *needle_P);
__result; \
}))
*/

#define printf_P_heap(f_P, ...) \
(__extension__({ \
char* __localF = (char*)malloc(strlen_P(f_P) + 1); \
Expand All @@ -142,7 +105,7 @@ char *strstr_P(char *haystack, const char *needle_P);
m_printf(__localF, ##__VA_ARGS__); \
}))

#define printf_P printf_P_stack
// #define printf_P printf_P_stack

#else /* ICACHE_FLASH */

Expand All @@ -167,15 +130,6 @@ char *strstr_P(char *haystack, const char *needle_P);

#endif /* ICACHE_FLASH */

/*
* Define and use a flash string inline
*/
#define PSTR(_str) \
(__extension__({ \
DEFINE_PSTR_LOCAL(__c, _str); \
&__c[0]; \
}))

/*
* Declare and use a flash string inline.
* Returns a pointer to a stack-allocated buffer of the precise size required.
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