mx6: solidrun: update the pl310 initialization settings

Besides enabling prefetch we also need to enable the shared
attribute override bit in the pl310's aux control register.

Not having this bit set makes the platform non-compliant with the
ARMv7 ARM specified behaviour of conflicting memory aliases.
Without this bit set the L2 controller will turn userspace bufferable
reads into "cachable, no allocate" which can lead to userspace hitting
stale, non-evicted cache lines.

Reference kernel commit eeedcea69e927857d32aaf089725eddd2c79dd0a

board/solidrun/mx6_cubox-i/mx6_cubox-i_spl.c

@@ -567,15 +567,19 @@ static u32 spl_get_imx_type(void)
 	return (cpurev & 0xFF000) >> 12;
 }
 
-static void prefetch_enable(void)
+static void l2x0_aux_setup(void)
 {
 #ifdef CONFIG_SYS_PL310_BASE
 	u32 reg;
 
+	/* prefetch enable */
 	writel(0x30000003, CONFIG_SYS_PL310_BASE + 0xf60);
 
 	reg = readl(CONFIG_SYS_PL310_BASE + 0x104);
+	/* early bsp */
 	reg |= (1 << 30);
+	/* shared attribute override */
+	reg |= (1 << 22);
 	writel(reg, CONFIG_SYS_PL310_BASE + 0x104);
 #endif
 }
@@ -602,7 +606,7 @@ void board_init_f(ulong dummy)
 
 	timer_init();
 	preloader_console_init();
-	prefetch_enable();
+	l2x0_aux_setup();
 
 	board_init_r(NULL, 0);
 }