Name		Name	Last commit message	Last commit date
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lab0		lab0
project		project
Readme.md		Readme.md

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SoC Labs

Labs projects for SoC

Lab0

Basic usage of VCS & Verdi & DC

Project

Convolution function:

Verilog. SRC
Simlute by vcs & verdi. VCS & Verdi
Synthesis by DC. DC
Physical Implemention By ICC

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Labs projects for SoC

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Verilog 96.3%
Tcl 3.4%
Other 0.3%