MIPS PIPELINE CPU

THUEE CPU

Name		Name	Last commit message	Last commit date
Latest commit History 2 Commits
figs		figs
ip		ip
.gitignore		.gitignore
ALU.v		ALU.v
ALUControl.v		ALUControl.v
BranchALU.v		BranchALU.v
CPU.v		CPU.v
CPU.xdc		CPU.xdc
Control.v		Control.v
DataMemory.v		DataMemory.v
EXForward.v		EXForward.v
IDForward.v		IDForward.v
InstructionMemory.v		InstructionMemory.v
LICENSE		LICENSE
LoadUse.v		LoadUse.v
RAM.coe		RAM.coe
ROM.coe		ROM.coe
RegisterFile.v		RegisterFile.v
core.asm		core.asm
readme.md		readme.md
test_cpu.v		test_cpu.v
top.v		top.v

Sweetnow/mips-pipeline-cpu