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Add buttons_arty target #1006

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merged 5 commits into from Sep 24, 2019
Merged

Add buttons_arty target #1006

merged 5 commits into from Sep 24, 2019

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duck2
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@duck2 duck2 commented Sep 17, 2019

This adds an arty-swbut board(separate from arty, which uses uart harness) which uses the swbut harness of Arty, and adds a case to xc7/tests/buttons so that make buttons_arty_prog works on HW.

@probot-autolabeler probot-autolabeler bot added arch-artix7 lang-verilog Issue uses (or requires) Verilog language. labels Sep 17, 2019
Signed-off-by: Fahrican Koşar <duck2@protonmail.com>
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LGTM apart from a minor change. Have you checked this correctly works on HW, right?

xc7/archs/artix7/devices/CMakeLists.txt Outdated Show resolved Hide resolved
Signed-off-by: Fahrican Koşar <duck2@protonmail.com>
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LGTM. Let's wait for green CI

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duck2 commented Sep 18, 2019

LGTM apart from a minor change. Have you checked this correctly works on HW, right?

I even boasted to a friend about it, "look, this is without Vivado!" :P

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duck2 commented Sep 18, 2019

looks like it's about the rename

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acomodi commented Sep 18, 2019

@duck2 So, 7-series CI failed with this output:

FAILED: cd /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/counter/counter_arty-uart/artix7-xc7a50t-arty-uart-roi-virt-xc7a50t-arty-uart-test && /usr/bin/cmake -E env PYTHONPATH=/tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/utils /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/env/conda/bin/python3 /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/xc7/utils/prjxray_create_ioplace.py --map /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/archs/artix7/devices/xc7a50t-arty-uart-roi-virt/synth_tiles_pinmap.csv --iostandard_defs /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/counter/counter_arty-uart/artix7-xc7a50t-arty-uart-roi-virt-xc7a50t-arty-uart-test/top.eblif.iostandard.json --blif /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/counter/counter_arty-uart/artix7-xc7a50t-arty-uart-roi-virt-xc7a50t-arty-uart-test/top.eblif --pcf /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/counter/arty-uart.pcf --out /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/counter/counter_arty-uart/artix7-xc7a50t-arty-uart-roi-virt-xc7a50t-arty-uart-test/top_io.place
usage: prjxray_create_ioplace.py [-h] --pcf PCF --blif BLIF --map MAP
                                 [--output OUTPUT]
                                 [--iostandard_defs IOSTANDARD_DEFS]
                                 [--iostandard IOSTANDARD] [--drive DRIVE]
prjxray_create_ioplace.py: error: argument --pcf/-p/-P: can't open '/tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/counter/arty-uart.pcf': [Errno 2] No such file or directory: '/tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/counter/arty-uart.pcf'
FAILED: cd /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/uart_loopback/uart_loopback_arty-uart/artix7-xc7a50t-arty-uart-roi-virt-xc7a50t-arty-uart-test && /usr/bin/cmake -E env PYTHONPATH=/tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/utils /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/env/conda/bin/python3 /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/xc7/utils/prjxray_create_ioplace.py --map /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/archs/artix7/devices/xc7a50t-arty-uart-roi-virt/synth_tiles_pinmap.csv --iostandard_defs /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/uart_loopback/uart_loopback_arty-uart/artix7-xc7a50t-arty-uart-roi-virt-xc7a50t-arty-uart-test/top.eblif.iostandard.json --blif /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/uart_loopback/uart_loopback_arty-uart/artix7-xc7a50t-arty-uart-roi-virt-xc7a50t-arty-uart-test/top.eblif --pcf /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/uart_loopback/arty-uart.pcf --out /tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/uart_loopback/uart_loopback_arty-uart/artix7-xc7a50t-arty-uart-roi-virt-xc7a50t-arty-uart-test/top_io.place
usage: prjxray_create_ioplace.py [-h] --pcf PCF --blif BLIF --map MAP
                                 [--output OUTPUT]
                                 [--iostandard_defs IOSTANDARD_DEFS]
                                 [--iostandard IOSTANDARD] [--drive DRIVE]
prjxray_create_ioplace.py: error: argument --pcf/-p/-P: can't open '/tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/uart_loopback/arty-uart.pcf': [Errno 2] No such file or directory: '/tmpfs/src/github/symbiflow-arch-defs-presubmit-xc7/build/xc7/tests/uart_loopback/arty-uart.pcf'

try to run locally: make all_arty_bin and see what happens. Probably there is a missing pcf file due to the renaming of the arty-uart board definition.

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litghost commented Sep 18, 2019

looks like it's about the rename

Ya. This is caused because add_fpga_boards in this case used IMPLICIT_INPUT_IO_FILES (which I do not recommend). Either change the target to use the explicit INPUT_IO_FILES argument form or rename the pcf file.

Signed-off-by: Fahrican Koşar <duck2@protonmail.com>
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duck2 commented Sep 19, 2019

------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ -------- --------- ------
      T Av Cost Av BB Cost Av TD Cost     CPD       sTNS     sWNS Ac Rate Std Dev  R lim Crit Exp Tot Moves  Alpha
------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ -------- --------- ------
Warning 17: Starting t: 1 of 3 configurations accepted.
0.0e+00   0.617       0.25 2.3135e-09   2.693      -2.69   -2.693   0.250  0.0000  157.0     1.00          4   -nan
Error 1: timing_cost_check: 2.56216e-09 and timing_cost: 2.31354e-09 differ in check_place.
Error 2: 
Type: Placement
File: /tmp/really-really-really-really-really-really-really-really-really-really-really-really-really-long-path/conda/conda-bld/vtr_1568138554726/work/vpr/src/place/place.cpp
Line: 3555
Message: 
Completed placement consistency check, 1 errors found.
Aborting program.

What could cause this?

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------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ -------- --------- ------
      T Av Cost Av BB Cost Av TD Cost     CPD       sTNS     sWNS Ac Rate Std Dev  R lim Crit Exp Tot Moves  Alpha
------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ -------- --------- ------
Warning 17: Starting t: 1 of 3 configurations accepted.
0.0e+00   0.617       0.25 2.3135e-09   2.693      -2.69   -2.693   0.250  0.0000  157.0     1.00          4   -nan
Error 1: timing_cost_check: 2.56216e-09 and timing_cost: 2.31354e-09 differ in check_place.
Error 2: 
Type: Placement
File: /tmp/really-really-really-really-really-really-really-really-really-really-really-really-really-long-path/conda/conda-bld/vtr_1568138554726/work/vpr/src/place/place.cpp
Line: 3555
Message: 
Completed placement consistency check, 1 errors found.
Aborting program.

What could cause this?

It's complaining about the incremental and full timing checks disagreeing by more than a certain amount. It likely means an ill-formed timing value somewhere. I haven't seen that particular problem in a while, and I'm surprised it cropped back up. For now let's just disable the error, assuming that the placer results are still reasonable.

@acomodi
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acomodi commented Sep 19, 2019

I would also create an issue to keep track of this error.

Signed-off-by: Fahrican Koşar <duck2@protonmail.com>
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duck2 commented Sep 24, 2019

Looks like I can build buttons_arty_bin with:

add_fpga_target(
  NAME buttons_arty
  BOARD arty-swbut
  SOURCES buttons_arty.v
  INPUT_IO_FILE arty.pcf
  )

but I can't build uart_loopback_arty_bin with:

add_fpga_target(
  NAME uart_loopback_arty
  BOARD arty-uart
  SOURCES uart_loopback.v
  INPUT_IO_FILE arty.pcf
  )

The build fails in xc7frames2bit missing its part_file argument.

Signed-off-by: Fahrican Koşar <duck2@protonmail.com>
@litghost litghost merged commit d0f9e77 into f4pga:master Sep 24, 2019
@duck2 duck2 mentioned this pull request Sep 25, 2019
mkurc-ant pushed a commit to antmicro/f4pga-arch-defs that referenced this pull request May 30, 2022
…les/third_party/litex-boards-8830d15

build(deps): bump third_party/litex-boards from `575d681` to `8830d15`
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