Merge changes Ic3368375,I09519e33,I69ceea10,I6d51c1bf,I7177fc01, ... …

…into integration

* changes:
  feat(qemu): Use common platform support
  refactor(plat/arm): Specialize PLAT_CMN_CTX_MAX_XLAT_TABLES
  feat(plat/arm): Introduce the common arm platform
  feat(lib/rmm_el3_ifc): get console info from EL3
  refactor(drivers/pl011): Use the console driver
  feat(plat/host): Introduce host console driver
  feat(lib/console): Introduce console driver

cmake/CommonConfigs.cmake

@@ -48,9 +48,7 @@ arm_config_option(
     NAME RMM_FPU_USE_AT_REL2
     HELP "Enable Advanced SIMD support in RMM"
     TYPE BOOL
-    DEFAULT ON
-    DEPENDS (RMM_ARCH STREQUAL aarch64)
-    ELSE OFF)
+    DEFAULT OFF)
 
 #
 # The number of 4K pages allocated for attestation buffer.

configs/fvp_defcfg.cmake

@@ -6,44 +6,20 @@
 #
 # Set the RMM_PLATFORM variable to Cmake cache.
 #
-set(RMM_PLATFORM "fvp" CACHE STRING "platform")
+set(RMM_PLATFORM "arm" CACHE STRING "platform")
 arm_config_option_override(NAME RMM_TOOLCHAIN DEFAULT "gnu")
 
-#
-# Width of the virtual address space for the system.
-#
-arm_config_option_override(NAME VIRT_ADDR_SPACE_WIDTH DEFAULT 38)
-
 #
 # Set RMM_MAX_SIZE for this platform (24MB)
 #
 arm_config_option_override(NAME RMM_MAX_SIZE DEFAULT 0x01800000)
 
-#
-# UART Base address. This must be dynamically discovered in future.
-# Use UART3 on the FVP for RMM.
-#
-arm_config_option_override(NAME RMM_UART_ADDR DEFAULT 0x1c0c0000)
-
-#
-# Extra memory regions needed by this platform
-#
-arm_config_option_override(NAME PLAT_CMN_EXTRA_MMAP_REGIONS DEFAULT 1)
-
 #
 # Maximum number of translation tables allocated by the runtime context
 # for the translation library.
 #
 arm_config_option_override(NAME PLAT_CMN_CTX_MAX_XLAT_TABLES DEFAULT 6)
 
-#
-# Disable FPU/SIMD usage in RMM. Enabling this option turns on
-# DMBEDTLS_SHAXXX_USE_A64_CRYPTO_ONLY in Mbed TLS. To run RMM that was compiled
-# this way requires Crypto.so plugin to be present for the FVP. This plugin is
-# delivered separate to the FVP, and might not be present in all environments.
-#
-arm_config_option_override(NAME RMM_FPU_USE_AT_REL2 DEFAULT OFF)
-
 #
 # Maximum number of granules supported, enough to cover
 # (2GB - 64MB) of DRAM0 and 2GB of DRAM1. We overprovision

configs/qemu_virt_defcfg.cmake

@@ -6,42 +6,19 @@
 #
 # Set the RMM_PLATFORM variable to Cmake cache.
 #
-set(RMM_PLATFORM "qemu" CACHE STRING "platform")
+set(RMM_PLATFORM "arm" CACHE STRING "platform")
 arm_config_option_override(NAME RMM_TOOLCHAIN DEFAULT "gnu")
 
-#
-# Width of the virtual address space for the system.
-#
-arm_config_option_override(NAME VIRT_ADDR_SPACE_WIDTH DEFAULT 38)
-
 #
 # Set RMM_MAX_SIZE for this platform (24MB)
 #
 arm_config_option_override(NAME RMM_MAX_SIZE DEFAULT 0x01800000)
 
-#
-# UART Base address. This must be dynamically discovered in future.
-# Use NS UART.
-#
-arm_config_option_override(NAME RMM_UART_ADDR DEFAULT 0x09000000)
-
-#
-# Extra memory regions needed by this platform: one region for UART.
-#
-arm_config_option_override(NAME PLAT_CMN_EXTRA_MMAP_REGIONS DEFAULT 1)
-
-#
 # Maximum number of translation tables allocated by the runtime context
 # for the translation library.
 #
 arm_config_option_override(NAME PLAT_CMN_CTX_MAX_XLAT_TABLES DEFAULT 7)
 
-#
-# Disable FPU/SIMD usage in RMM for now. Enabling this causes the Realm guest
-# boot to hang, and needs to be investigated.
-#
-arm_config_option_override(NAME RMM_FPU_USE_AT_REL2 DEFAULT OFF)
-
 #
 # Maximum number of granules supported.
 #

docs/getting_started/build-options.rst

@@ -270,7 +270,6 @@ The |RMM| build system supports the following CMake build options.
    RMM_TOOLCHAIN		,gnu | llvm		,			,"Toolchain name"
    LOG_LEVEL			,0 - 50			,40(Debug) 20(Release)	,"Log level to apply for RMM (0 - 50)."
    RMM_STATIC_ANALYSIS		,			,			,"Enable static analysis checkers"
-   RMM_UART_ADDR		,			,0x0			,"Base addr of UART to be used for RMM logs"
    PLAT_CMN_CTX_MAX_XLAT_TABLES ,			,0			,"Maximum number of translation tables used by the runtime context"
    PLAT_CMN_EXTRA_MMAP_REGIONS	,			,0			,"Extra platform mmap regions that need to be mapped in S1 xlat tables"
    RMM_NUM_PAGES_PER_STACK	,			,5			,"Number of pages to use per CPU stack"

drivers/pl011/CMakeLists.txt

@@ -8,19 +8,6 @@ add_library(rmm-driver-pl011)
 target_link_libraries(rmm-driver-pl011
     PRIVATE rmm-lib)
 
-arm_config_option(
-    NAME RMM_UART_ADDR
-    HELP "Physical UART address"
-    TYPE STRING
-    DEFAULT 0x0)
-
-if(RMM_UART_ADDR EQUAL 0x0)
-    message(FATAL_ERROR "RMM_UART_ADDR is not initialized")
-endif()
-
-target_compile_definitions(rmm-driver-pl011
-    PUBLIC "RMM_UART_ADDR=ULL(${RMM_UART_ADDR})")
-
 target_include_directories(rmm-driver-pl011
     PUBLIC "include")
 

drivers/pl011/include/pl011.h

@@ -8,44 +8,16 @@
 
 #include <stdint.h>
 
-/* PL011 Registers */
-#define UARTDR			0x00U
-#define UARTECR			0x04U
-#define UARTFR			0x18U
-
-/* PL011 registers (out of the SBSA specification) */
-#define UARTIBRD		0x24U
-#define UARTFBRD		0x28U
-#define UARTLCR_H		0x2CU
-#define UARTCR			0x30U
-
-/* Flag reg bits */
-
-/* Transmit FIFO full */
-#define PL011_UARTFR_TXFF	(U(1) << 5)
-
-/* Control reg bits */
-#define PL011_UARTCR_RXE	(U(1) << 9)	/* Receive enable */
-#define PL011_UARTCR_TXE	(U(1) << 8)	/* Transmit enable */
-#define PL011_UARTCR_UARTEN	(U(1) << 0)	/* UART Enable */
-
-/* FIFO Enabled / No Parity / 8 Data bit / One Stop Bit */
-#define PL011_LINE_CONTROL	(PL011_UARTLCR_H_FEN | PL011_UARTLCR_H_WLEN_8)
-
-/* Line Control Register Bits */
-#define PL011_UARTLCR_H_WLEN_8	(U(3) << 5)
-#define PL011_UARTLCR_H_FEN	(U(1) << 4)	/* FIFOs Enable */
-
 /*
- * Function that initiates UART for console output
+ * Function that initiates PL011 for console output
  * Arguments:
  *   base_addr - UART base address
  *   uart_clk  - UART input clock which sets master trasmit/receive rate
  *   baud_rate - UART Baudrate
  * Returns:
- *   0 on success or -1 when invalid baseaddr/clock/baud is used
+ *   0 on success or -EINVAL when invalid base address/clock/baud is used
  */
-int uart_init(uintptr_t base_addr, unsigned int uart_clk,
+int pl011_init(uintptr_t base_addr, unsigned int uart_clk,
 		unsigned int baud_rate);
 
 #endif /* PL011_H */

drivers/pl011/src/pl011.c

@@ -3,76 +3,112 @@
  * SPDX-FileCopyrightText: Copyright TF-RMM Contributors.
  */
 
+#include <assert.h>
+#include <console.h>
+#include <errno.h>
 #include <mmio.h>
 #include <pl011.h>
-#include <stdio.h>
 #include <utils_def.h>
 
-static inline void uart_wait(void)
+/* PL011 Registers */
+#define UARTDR			0x00U
+#define UARTECR			0x04U
+#define UARTFR			0x18U
+
+/* PL011 registers (out of the SBSA specification) */
+#define UARTIBRD		0x24U
+#define UARTFBRD		0x28U
+#define UARTLCR_H		0x2CU
+#define UARTCR			0x30U
+
+/* Flag reg bits */
+
+/* Transmit FIFO full */
+#define PL011_UARTFR_TXFF	(U(1) << 5)
+
+/* Control reg bits */
+#define PL011_UARTCR_RXE	(U(1) << 9)	/* Receive enable */
+#define PL011_UARTCR_TXE	(U(1) << 8)	/* Transmit enable */
+#define PL011_UARTCR_UARTEN	(U(1) << 0)	/* UART Enable */
+
+/* FIFO Enabled / No Parity / 8 Data bit / One Stop Bit */
+#define PL011_LINE_CONTROL	(PL011_UARTLCR_H_FEN | PL011_UARTLCR_H_WLEN_8)
+
+/* Line Control Register Bits */
+#define PL011_UARTLCR_H_WLEN_8	(U(3) << 5)
+#define PL011_UARTLCR_H_FEN	(U(1) << 4)	/* FIFOs Enable */
+
+static inline void pl011_wait(uintptr_t base)
 {
 	/* Wait until there is room in the Tx FIFO */
-	while ((read32((void *)((RMM_UART_ADDR) + UARTFR))
+	while ((read32((void *)(base + UARTFR))
 				& PL011_UARTFR_TXFF) != 0U) {
 		/* Do nothing */
 	}
 }
 
-/* Function that initializes UART for console output */
-int uart_init(uintptr_t base_addr,
+static void writechar(uintptr_t base, int ch)
+{
+	pl011_wait(base);
+	write8((uint8_t)ch, (void *)(base + UARTDR));
+}
+
+/* Serial output - called from console driver */
+/* coverity[misra_c_2012_rule_8_7_violation:SUPPRESS] */
+static int pl011_putc(int c, struct console *csl)
+{
+	assert(csl != NULL);
+
+	if ((char)c == '\n') {
+		/* NOLINTNEXTLINE(google-readability-casting) */
+		writechar(csl->base, (int)'\r');
+	}
+	writechar(csl->base, c);
+
+	return c;
+}
+
+static struct console pl011_csl = {
+	.putc = pl011_putc,
+	.flush = NULL
+};
+
+/* Function that initializes PL011 for console output */
+int pl011_init(uintptr_t base_addr,
 		unsigned int uart_clk,
 		unsigned int baud_rate)
 {
 	unsigned int div;
 
 	/* Check Base address, baud rate and UART clock for sanity */
-	if (base_addr == 0UL) {
-		return -1;
-	}
-
-	if (uart_clk == 0U) {
-		return -1;
-	}
-
-	if (baud_rate == 0U) {
-		return -1;
+	if ((base_addr == 0UL) || (uart_clk == 0U) ||
+		(baud_rate == 0U)) {
+		return -EINVAL;
 	}
 
 	/* Disable UART before programming */
-	write32(0U, (void *)((RMM_UART_ADDR) + UARTCR));
+	write32(0U, (void *)(base_addr + UARTCR));
 
 	/* Program the baud rate */
 	div = (uart_clk * 4U) / baud_rate;
 
 	/* IBRD = Divisor >> 6 */
-	write32(div >> 6, (void *)((RMM_UART_ADDR) + UARTIBRD));
+	write32(div >> 6, (void *)((base_addr) + UARTIBRD));
 
 	/* FBRD = Divisor & 0x3F */
-	write32(div & 0x3fU, (void *)((RMM_UART_ADDR) + UARTFBRD));
+	write32(div & 0x3fU, (void *)((base_addr) + UARTFBRD));
 
 	/* Enable FIFO and set word length, parity and number of stop bits */
-	write32(PL011_LINE_CONTROL, (void *)((RMM_UART_ADDR) + UARTLCR_H));
+	write32(PL011_LINE_CONTROL, (void *)((base_addr) + UARTLCR_H));
 
 	/* Clear any pending errors */
-	write32(0U, (void *)((RMM_UART_ADDR) + UARTECR));
+	write32(0U, (void *)((base_addr) + UARTECR));
 
 	/* Enable Tx, Rx, and UART overall */
 	write32(PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN,
-		(void *)((RMM_UART_ADDR) + UARTCR));
-	return 0;
-}
+		(void *)((base_addr) + UARTCR));
 
-static void uart_putc(char ch)
-{
-	uart_wait();
-	write8((uint8_t)ch, (void *)((RMM_UART_ADDR) + UARTDR));
-}
+	pl011_csl.base = base_addr;
 
-/* Serial output - called from printf */
-/* coverity[misra_c_2012_rule_8_7_violation:SUPPRESS] */
-void putchar(char character)
-{
-	if (character == '\n') {
-		uart_putc('\r');
-	}
-	uart_putc(character);
+	return console_register(&pl011_csl);
 }

lib/CMakeLists.txt

@@ -10,6 +10,7 @@ target_link_libraries(rmm-lib
               rmm-lib-arch
               rmm-lib-attestation
               rmm-lib-common
+              rmm-lib-console
               rmm-lib-debug
               rmm-lib-gic
               rmm-lib-measurement
@@ -25,6 +26,7 @@ add_subdirectory("allocator")
 add_subdirectory("arch")
 add_subdirectory("attestation")
 add_subdirectory("common")
+add_subdirectory("console")
 add_subdirectory("debug")
 add_subdirectory("gic")
 add_subdirectory("mbedtls")

lib/console/CMakeLists.txt

@@ -0,0 +1,18 @@
+#
+# SPDX-License-Identifier: BSD-3-Clause
+# SPDX-FileCopyrightText: Copyright TF-RMM Contributors.
+#
+
+add_library(rmm-lib-console)
+
+target_link_libraries(rmm-lib-console
+  PRIVATE
+    rmm-lib-common
+)
+
+target_include_directories(rmm-lib-console
+  PUBLIC "include")
+
+target_sources(rmm-lib-console
+  PRIVATE
+    "src/console.c")