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A Extension, Reservation Table, and Multi-threading Support #121

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d96aa80
ignore build files
giancarlopernudisegura May 14, 2021
e846a9d
lr.w and sc.w syntax support
giancarlopernudisegura May 14, 2021
7363378
fix sc.w instructions
giancarlopernudisegura May 15, 2021
fd13240
ReserveTable for 2 processors with shared memory
Sivachow May 25, 2021
2514a83
macOS .DS_Store
Sivachow May 25, 2021
fcac477
ReserveTable for 2 processors with shared memory
Sivachow May 25, 2021
7a12061
Merge branch 'ReservationTable' of https://github.com/giancarlopernud…
Sivachow May 25, 2021
e9022e0
Reserve Table
Sivachow May 25, 2021
e81c253
General Reserve Table
Sivachow May 27, 2021
d37dcf5
General Reserve Table 27 May
Sivachow May 27, 2021
7ea28ab
reservation table and tables
giancarlopernudisegura May 28, 2021
31a24b6
Commit
Sivachow May 28, 2021
37680f5
Small change
Sivachow May 28, 2021
815f798
basic tool
giancarlopernudisegura May 28, 2021
f555edb
28 May
Sivachow May 28, 2021
b5d07df
Merge branch 'ReservationTable' of https://github.com/giancarlopernud…
Sivachow May 28, 2021
c8bdb74
28 May
Sivachow May 28, 2021
a6000a0
integrate reservation table with lr.w and sc.w
giancarlopernudisegura May 28, 2021
f2911f9
show reservation table and help
giancarlopernudisegura May 29, 2021
af791d7
fix duplication of first cell
giancarlopernudisegura May 29, 2021
2d3e687
add table headers
giancarlopernudisegura May 29, 2021
9de9f2e
unreserve selection
giancarlopernudisegura May 29, 2021
735c061
Moved Clear to button area
Sivachow May 29, 2021
a4183fe
Modified Clear Selected
Sivachow May 29, 2021
92cefca
May 29
Sivachow May 29, 2021
d60dfb5
Reserve Table Layout
Sivachow May 29, 2021
56deb61
Reserve Table Tool
Sivachow May 29, 2021
87d0808
Changed 'Processor' to Hart'
Sivachow May 31, 2021
60d1341
change hart in help window to lowercase
giancarlopernudisegura Jun 1, 2021
22c1477
add atomic instructions example
giancarlopernudisegura Jun 2, 2021
21ef508
redefine all atomic instructions to be R type
giancarlopernudisegura Jun 2, 2021
ba9fd8e
parent AMO class
giancarlopernudisegura Jun 2, 2021
7a66fa1
Fixing the glue before clearselect
Sivachow Jun 3, 2021
ce33c92
Merge branch 'master' of https://github.com/giancarlopernudisegura/rars
Sivachow Jun 3, 2021
888a561
unreserve address on regular store
giancarlopernudisegura Jun 6, 2021
1cf1ea4
implement rest of 32-bit atomic instructions
giancarlopernudisegura Jun 6, 2021
8b0ce6e
Added To GUI
Sivachow Jun 7, 2021
3a5ab65
atomic 64-bit support
giancarlopernudisegura Jun 7, 2021
665ec73
GUI for Harts
Sivachow Jun 8, 2021
4fd92f5
Added the GUI for Harts
Sivachow Jun 8, 2021
58c3f05
Bug fix for Window GUI
Sivachow Jun 9, 2021
30d37fd
Merge branch 'TheThirdOne:master' into master
giancarlopernudisegura Jun 9, 2021
4875de9
categorize atomic instructions in statistics tool
giancarlopernudisegura Jun 9, 2021
095b715
update getInstructionCategory description for instruction support
giancarlopernudisegura Jun 9, 2021
9cf6d0a
add mhartid csr
giancarlopernudisegura Jun 9, 2021
a72d74e
sc.w/d returns unspecified failiure
giancarlopernudisegura Jun 9, 2021
d3c92b3
Moving the Harts to Globals
Sivachow Jun 10, 2021
9970c10
Merge branch 'master' of https://github.com/giancarlopernudisegura/rars
Sivachow Jun 10, 2021
0e17170
Documentation
Sivachow Jun 10, 2021
0cc3815
add rv32a unit tests
giancarlopernudisegura Jun 11, 2021
895bfb7
Fixed bugs for more than One Hart
Sivachow Jun 11, 2021
988346a
add rv64a unit tests
giancarlopernudisegura Jun 11, 2021
fc77595
All Harts work alike
Sivachow Jun 16, 2021
35cda76
fix sc on 64-bit mode
giancarlopernudisegura Jun 18, 2021
f703297
rename atomic example
giancarlopernudisegura Jun 18, 2021
85c7e75
Mannual Harts selection
Sivachow Jun 23, 2021
75d834b
MultiThreading Works except LR.W and SC.W
Sivachow Jun 23, 2021
2020e7a
reopen reservation table tool on hart update
giancarlopernudisegura Jun 23, 2021
cb52a90
add hart variable to ProgramStatement
giancarlopernudisegura Jun 24, 2021
85a9631
maximise text segment on extra hart windows
giancarlopernudisegura Jun 24, 2021
a795b31
add harts cli argument
giancarlopernudisegura Jul 8, 2021
c4feba9
Hart -1 independent, needs bug fixes
Sivachow Jul 9, 2021
6d4ae4f
Merge branch 'master' of https://github.com/giancarlopernudisegura/rars
Sivachow Jul 9, 2021
54661e8
Immediate and Arithmatic support
Sivachow Jul 13, 2021
2f6992d
add run buttons to secondary hart windows
giancarlopernudisegura Jul 13, 2021
1b33010
Harts works dependent with main Hart
Sivachow Jul 20, 2021
d606cf1
Updating registers work
Sivachow Jul 20, 2021
566200f
Highlightung works with few bugs
Sivachow Jul 22, 2021
7534aed
sync action buttons with main window
giancarlopernudisegura Jul 22, 2021
ff2c506
set terminal state independent
giancarlopernudisegura Jul 23, 2021
5509ea0
extend Zicsr for multithread support
giancarlopernudisegura Jul 26, 2021
01262f3
update cycle, instret, time csr on secondary harts
giancarlopernudisegura Jul 29, 2021
91a945a
fix component not found error
giancarlopernudisegura Aug 3, 2021
cc5db18
enable multithreaded branching
giancarlopernudisegura Aug 5, 2021
44ed41c
reset pc on reassemble for secondary harts
giancarlopernudisegura Aug 5, 2021
4da0506
add per hart execution setting
giancarlopernudisegura Aug 6, 2021
aeb5dc8
extend traps and interuptions to multithread
giancarlopernudisegura Aug 12, 2021
3b535d6
extend all but float instructions to multithread
giancarlopernudisegura Aug 13, 2021
3249da4
extend store instructions to multithread
giancarlopernudisegura Aug 13, 2021
1895866
multithread f+d extensions
giancarlopernudisegura Aug 17, 2021
0b3453d
fix negative references on secondary harts
giancarlopernudisegura Aug 17, 2021
6682000
PC register Fix
Sivachow Aug 20, 2021
5c4f453
fix (but not completely) highlighting on secondary harts
giancarlopernudisegura Aug 24, 2021
b3d1cfd
set menu state terminated general venus ui
giancarlopernudisegura Aug 24, 2021
f4c4a7c
Ecall Fixed 💀
Sivachow Aug 24, 2021
e97482d
multithread getting null strings
giancarlopernudisegura Aug 26, 2021
6818d53
fix GeneralVenusUI constructor
giancarlopernudisegura Aug 26, 2021
7451ae9
fix reservation table update call
giancarlopernudisegura Aug 26, 2021
39e59a6
fix syscall open and read multithreading
giancarlopernudisegura Aug 26, 2021
2e3a5db
Sys call Fixes :)
Sivachow Aug 26, 2021
eddb11b
Sys call Update
Sivachow Aug 30, 2021
c8a6dce
fix opening hart 2+
giancarlopernudisegura Aug 31, 2021
6371a8f
remove unnecessary syscall import
giancarlopernudisegura Sep 1, 2021
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7 changes: 7 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -6,3 +6,10 @@ out
.classpath
.project
examples/riscv

# RARS build
build/
rars.jar

# macOS
.DS_Store
15 changes: 15 additions & 0 deletions examples/atomic.s
Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
.globl main
.data
num:
.word 0x12345678

.text
main:
la t0, num
retry:
lr.w t1, (t0)
# increment by 1
addi t1, t1, 1
sc.w t2, t1, (t0)
# if save fails; retry operations again
bne zero, t2, retry
Binary file added src/images/Shared.png
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21 changes: 20 additions & 1 deletion src/rars/Globals.java
Original file line number Diff line number Diff line change
Expand Up @@ -2,10 +2,12 @@

import rars.assembler.SymbolTable;
import rars.riscv.hardware.Memory;
import rars.riscv.hardware.ReservationTables;
import rars.riscv.InstructionSet;
import rars.riscv.SyscallNumberOverride;
import rars.util.PropertiesFile;
import rars.venus.VenusUI;
import rars.venus.GeneralVenusUI;

import java.util.ArrayList;
import java.util.Enumeration;
Expand Down Expand Up @@ -68,6 +70,10 @@ public class Globals {
* Simulated memory component.
**/
public static Memory memory;
/**
* Simulated reservation tables component.
**/
public static ReservationTables reservationTables;
/**
* Lock variable used at head of synchronized block to guard memory and registers
**/
Expand Down Expand Up @@ -140,6 +146,18 @@ public class Globals {

public static boolean runSpeedPanelExists = false;

private static int harts = 1;

private static ArrayList<GeneralVenusUI> hartWindows = new ArrayList();


public static ArrayList<GeneralVenusUI> getHartWindows(){
return hartWindows;
}

public static int getHarts() {
return harts;
}
private static String getCopyrightYears() {
return "2003-2019";
}
Expand All @@ -166,7 +184,8 @@ public static Settings getSettings() {

public static void initialize(boolean gui) {
if (!initialized) {
memory = Memory.getInstance(); //clients can use Memory.getInstance instead of Globals.memory
memory = Memory.getInstance(); //clients can use Memory.getInstance instead of Globals.memory
reservationTables = new ReservationTables(harts);
symbolTable = new SymbolTable("global");
settings = new Settings(gui);
instructionSet = new InstructionSet();
Expand Down
1 change: 1 addition & 0 deletions src/rars/api/Program.java
Original file line number Diff line number Diff line change
Expand Up @@ -130,6 +130,7 @@ private ErrorList assemble(ArrayList<RISCVprogram> programs) throws AssemblyExce
*/
public void setup(ArrayList<String> args, String STDIN){
RegisterFile.resetRegisters();
Globals.reservationTables.reset();
FloatingPointRegisterFile.resetRegisters();
ControlAndStatusRegisterFile.resetRegisters();
InterruptController.reset();
Expand Down
2 changes: 1 addition & 1 deletion src/rars/riscv/BasicInstructionFormat.java
Original file line number Diff line number Diff line change
Expand Up @@ -41,5 +41,5 @@ public enum BasicInstructionFormat {
S_FORMAT, // 2 src registers + small immediate
B_FORMAT, // 2 src registers + small immediate shifted left
U_FORMAT, // 1 dst register + large immediate
J_FORMAT // 1 dst register + large immediate for jumping
J_FORMAT, // 1 dst register + large immediate for jumping
}
4 changes: 3 additions & 1 deletion src/rars/riscv/hardware/ControlAndStatusRegisterFile.java
Original file line number Diff line number Diff line change
Expand Up @@ -70,13 +70,15 @@ public class ControlAndStatusRegisterFile {
null, // cycleh
null, // timeh
null, // instreth
null, // mhartid
};
tmp[1] = new LinkedRegister("fflags", 0x001, tmp[3], 0x1F);
tmp[2] = new LinkedRegister("frm", 0x002, tmp[3], 0xE0);

tmp[14] = new LinkedRegister("cycleh", 0xC80,tmp[11], 0xFFFFFFFF_00000000L);
tmp[15] = new LinkedRegister("timeh", 0xC81, tmp[12],0xFFFFFFFF_00000000L);
tmp[16] = new LinkedRegister("instreth",0xC82, tmp[13],0xFFFFFFFF_00000000L);
tmp[16] = new LinkedRegister("instreth", 0xC82, tmp[13], 0xFFFFFFFF_00000000L);
tmp[17] = new ReadOnlyRegister("mhartid", 0xF10, 0);
instance = new RegisterBlock('_', tmp); // prefix not used
}

Expand Down
65 changes: 65 additions & 0 deletions src/rars/riscv/hardware/ReservationTable.java
Original file line number Diff line number Diff line change
@@ -0,0 +1,65 @@
package rars.riscv.hardware;

import java.util.ArrayList;

/*
Copyright (c) 2021, Siva Chowdeswar Nandipati & Giancarlo Pernudi Segura.

Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject
to the following conditions:

The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR
ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

(MIT license, http://www.opensource.org/licenses/mit-license.html)
*/

public class ReservationTable {
private ArrayList<Integer> table;
public final static int capacity = 8;

public ReservationTable() {
table = new ArrayList<Integer>();
}

public void reserveAddress(int address) {
if(table.contains(Integer.valueOf(address)))
return;
if (table.size() == capacity)
table.remove(0);
table.add(Integer.valueOf(address));
}

public void unreserveAddress(int address) {
table.removeIf(val -> val == address);
}

public boolean contains(int address) {
return table.contains(Integer.valueOf(address));
}

public Integer[] getAddresses() {
Integer[] addresses = new Integer[capacity];
for (int i = 0; i < capacity; i++) {
try {
addresses[i] = table.get(i);
} catch (IndexOutOfBoundsException e) {
addresses[i] = 0;
}
}
return addresses;
}
}
130 changes: 130 additions & 0 deletions src/rars/riscv/hardware/ReservationTables.java
Original file line number Diff line number Diff line change
@@ -0,0 +1,130 @@
package rars.riscv.hardware;

import java.util.Collection;
import java.util.Observable;
import java.util.Observer;
import java.util.Vector;

import rars.SimulationException;
import rars.riscv.InstructionSet;

/*
Copyright (c) 2021, Siva Chowdeswar Nandipati & Giancarlo Pernudi Segura.

Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject
to the following conditions:

The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR
ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

(MIT license, http://www.opensource.org/licenses/mit-license.html)
*/

public class ReservationTables extends Observable {
private ReservationTable[] reservationTables;
public int harts;
private Collection<ReservationTablesObservable> observables = new Vector<>();

public ReservationTables(int harts) {
this.harts = harts;
reset();
}

public void reset() {
reservationTables = new ReservationTable[harts];
for (int i = 0; i < reservationTables.length; i++) {
reservationTables[i] = new ReservationTable();
}
}

public void reserveAddress(int hart, int address) throws AddressErrorException {
int modulo = InstructionSet.rv64 ? 8 : 4;
if (address % modulo != 0) {
throw new AddressErrorException("Reservation address not aligned to word boundary ", SimulationException.LOAD_ADDRESS_MISALIGNED, address);
}
reservationTables[hart].reserveAddress(address);
}

public boolean unreserveAddress(int hart, int address) throws AddressErrorException {
int modulo = InstructionSet.rv64 ? 8 : 4;
if (address % modulo != 0) {
throw new AddressErrorException("Reservation address not aligned to word boundary ", SimulationException.STORE_ADDRESS_MISALIGNED, address);
}
if (reservationTables[hart].contains(address)) {
for (ReservationTable reservationTable : reservationTables) {
reservationTable.unreserveAddress(address);
}
return true;
}
return false;
}

public Integer[][] getAllAddresses() {
Integer[][] all = new Integer[ReservationTable.capacity][harts];
for (int i = 0; i < ReservationTable.capacity; i++) {
for (int j = 0; j < harts; j++) {
Integer[] addresses = reservationTables[j].getAddresses();
all[i][j] = addresses[i];
}
}
return all;
}

public String[][] getAllAddressesAsStrings() {
String[][] all = new String[ReservationTable.capacity][harts];
for (int i = 0; i < ReservationTable.capacity; i++) {
for (int j = 0; j < harts; j++) {
Integer[] addresses = reservationTables[j].getAddresses();
all[i][j] = String.format("0x%08x", addresses[i]);
}
}
return all;
}

public void addObserver(Observer obs) {
observables.add(new ReservationTablesObservable(obs));
}

/**
* Remove specified reservation tables observer
*
* @param obs Observer to be removed
*/
public void deleteObserver(Observer obs) {
for (ReservationTablesObservable o : observables) {
o.deleteObserver(obs);
}
}

/**
* Remove all reservation tables observers
*/
public void deleteObservers() {
// just drop the collection
observables = new Vector<>();
}

private class ReservationTablesObservable extends Observable {
public ReservationTablesObservable(Observer obs) {
this.addObserver(obs);
}

public void notifyObserver(MemoryAccessNotice notice) {
this.setChanged();
this.notifyObservers(notice);
}
}
}
39 changes: 39 additions & 0 deletions src/rars/riscv/instructions/AMOADDD.java
Original file line number Diff line number Diff line change
@@ -0,0 +1,39 @@
package rars.riscv.instructions;

/*
Copyright (c) 2021, Giancarlo Pernudi Segura

Developed by Giancarlo Pernudi Segura at the University of Alberta (pernudi@ualberta.ca)

Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject
to the following conditions:

The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR
ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

(MIT license, http://www.opensource.org/licenses/mit-license.html)
*/

public class AMOADDD extends AtomicMemoryOperation {
public AMOADDD() {
super("amoadd.d t0, t1, (t2)", "Loads value at t2 and places it into t0, adds value t1 and t0 (new), and saves at memory location t2.", "00000", true);
}

@Override
protected long binaryOperation(long value1, long value2) {
return value1 + value2;
}
}
39 changes: 39 additions & 0 deletions src/rars/riscv/instructions/AMOADDW.java
Original file line number Diff line number Diff line change
@@ -0,0 +1,39 @@
package rars.riscv.instructions;

/*
Copyright (c) 2021, Giancarlo Pernudi Segura

Developed by Giancarlo Pernudi Segura at the University of Alberta (pernudi@ualberta.ca)

Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject
to the following conditions:

The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR
ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

(MIT license, http://www.opensource.org/licenses/mit-license.html)
*/

public class AMOADDW extends AtomicMemoryOperation {
public AMOADDW() {
super("amoadd.w t0, t1, (t2)", "Loads value at t2 and places it into t0, adds value t1 and t0 (new), and saves at memory location t2.", "00000");
}

@Override
protected long binaryOperation(long value1, long value2) {
return value1 + value2;
}
}