imx6sx-udoo-neo-m4.dtsi

/*
 * Copyright (C) 2015 Jasbir Matharu
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */


/ {
	reserved-memory {

		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/* Reserved 8Mb for M4 */
		m4_memory:  m4@0x84000000 {
			no-map;
			reg = <0x84000000 0x00800000>;
		};

		/* Reserved 1Mb for MCC */
		mcc_memory:  m4@0xBFF00000 {
			no-map;
			reg = <0xBFF00000 0x00100000>;
		};
	};
};

&sema4 {
	status = "okay";
};

&qspi_m4 {
	status = "okay";
};

&mcctest{
	status = "disabled";
};

&mcctty{
	status = "okay";
};


/*
 * The flollowing modules are conflicting with M4, disable them when m4
 * is running.
 */

&gpio4 {
        m4-reserved-pin = <4 6 8 9>;
};

&gpio5 {
        m4-reserved-pin = <12 13 14 15 18 19 20 21>;
};

&gpio6 {
        m4-reserved-pin = <18 19>;
};


&snvs {
	status = "disabled";
};

/*&i2c2 {
	status = "disabled";
};*/

&i2c3 {
	status = "disabled";
};

/*&i2c4 {
	status = "disabled";
};*/

&pwm1 {
	status = "disabled";
};

&pwm2 {
	status = "disabled";
};

&pwm3 {
	status = "disabled";
};

&pwm4 {
	status = "disabled";
};

&pwm5 {
	status = "disabled";
};

&pwm6 {
	status = "disabled";
};

&pwm7 {
	status = "disabled";
};

&pwm8 {
	status = "disabled";
};

&uart2 {
	status = "disabled";
};

&adc1 {
	status = "disabled";
};

&adc2 {
	status = "disabled";
};

&qspi2 {
	status = "disabled";
};

&ocram {
	reg = <0x00901000 0x1E000>;
};

&clks {
	fsl,shared-clks-number = <0x23>;
	fsl,shared-clks-index = <IMX6SX_CLK_PLL2_BUS IMX6SX_CLK_PLL2_PFD0
	IMX6SX_CLK_PLL2_PFD2 IMX6SX_CLK_PLL3_USB_OTG
	IMX6SX_CLK_PLL3_PFD1 IMX6SX_CLK_PLL3_PFD2
	IMX6SX_CLK_PLL3_PFD3 IMX6SX_CLK_PLL4_AUDIO
	IMX6SX_CLK_PLL5_VIDEO
	IMX6SX_CLK_OCRAM IMX6SX_CLK_CAN1_SERIAL
	IMX6SX_CLK_CAN1_IPG IMX6SX_CLK_CAN2_SERIAL
	IMX6SX_CLK_CAN2_IPG IMX6SX_CLK_CANFD
	IMX6SX_CLK_ECSPI1 IMX6SX_CLK_ECSPI2
	IMX6SX_CLK_ECSPI3 IMX6SX_CLK_ECSPI4
	IMX6SX_CLK_ECSPI5 IMX6SX_CLK_QSPI1
	IMX6SX_CLK_QSPI2 IMX6SX_CLK_SSI1
	IMX6SX_CLK_SSI2 IMX6SX_CLK_SSI3
	IMX6SX_CLK_UART_SERIAL IMX6SX_CLK_UART_IPG
	IMX6SX_CLK_PERIPH_CLK2_SEL IMX6SX_CLK_OCRAM_ALT_SEL
	IMX6SX_CLK_I2C1 IMX6SX_CLK_I2C2
	IMX6SX_CLK_I2C3 IMX6SX_CLK_I2C4
	IMX6SX_CLK_EPIT1 IMX6SX_CLK_EPIT2>;
	fsl,shared-mem-addr = <0x91F000>;
	fsl,shared-mem-size = <0x1000>;
};