Skip to content
This repository has been archived by the owner on Apr 9, 2021. It is now read-only.

Added libv #6

Open
wants to merge 2 commits into
base: master
Choose a base branch
from
Open

Added libv #6

wants to merge 2 commits into from

Conversation

martinjthompson
Copy link

@martinjthompson martinjthompson commented May 9, 2018

What is this VHDL project?

A small collection of utilities

What's the difference between this VHDL project and similar ones?

I'm not aware of other time/frequency conversions. The assert with reporting is probably done endless times in other places though!


Anyone who agrees with this pull request could vote for it by adding a 👍 to
it, and usually, the maintainer will merge it when votes reach 10.

@Paebbels
Copy link
Member

Paebbels commented May 9, 2018

Other libraries containing time/frequency conversions:

P.S. You can upvote your own PR :)

@martinjthompson
Copy link
Author

martinjthompson commented May 10, 2018 via email

@Paebbels
Copy link
Member

Your library was a great inspiration, but I personally think that the functionality provided by PoC is even bigger. We use this actively in many entities to specify generic I/O components. So e.g. wie specify the board's system clock frequency, so any counter generating some timing get's adjusted to it's minimal needs.

@martinjthompson
Copy link
Author

martinjthompson commented May 10, 2018 via email

Sign up for free to subscribe to this conversation on GitHub. Already have an account? Sign in.
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

None yet

2 participants