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Structured constraint files for HDL designs targeting FPGA boards #20

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umarcor opened this issue Oct 22, 2020 · 0 comments
Open

Structured constraint files for HDL designs targeting FPGA boards #20

umarcor opened this issue Oct 22, 2020 · 0 comments
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@umarcor
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umarcor commented Oct 22, 2020

ref: https://github.com/hdl/constraints
tags: [fpga, synthesis, xdc, lpf, pcf, ucf, sdc]
related: [23, 27]
repo: hdl/constraints

Any HDL design targeting FPGA boards needs constraint files in a vendor/tool specific format. Constraints are typically tied to the board and the interfaces, but not to the actual design. Therefore, copying them is inefficient and increases the maintenance burden of projects including multiple designs to be tested on several boards. This repository provides constraint definitions in a standardised and distributed format, fot decoupling board details from design sources.

@umarcor umarcor added the cat: Tools Tools label Oct 22, 2020
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