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Sourcecode <xil/xil_BSCAN.vhdl>Testbench <xil/xil_BSCAN_tb.vhdl>
This module wraps Xilinx "Boundary Scan" (JTAG) primitives in a generic module. Supported devices are: * Spartan-3, Spartan-6 * Virtex-5, Virtex-6 * Series-7 (Artix-7, Kintex-7, Virtex-7, Zynq-7000)
Entity Declaration:
../../../src/xil/xil_BSCAN.vhdl
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Source file: xil/xil_BSCAN.vhdl <xil/xil_BSCAN.vhdl>