adds new minres peripherals

VP-Vibes · Feb 22, 2024 · 899316d · 899316d
1 parent 08864ff
commit 899316d
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Showing 10 changed files with 47 additions and 31 deletions.
diff --git a/minres/gen/Apb3AClint_regs.h b/minres/gen/Apb3AClint_regs.h
@@ -1,8 +1,10 @@
 /*
-* Copyright (c) 2024 MINRES Technologies GmbH
+* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
 *
-* Generated at 2024-02-08 12:22:11 UTC 
-* by peakrdl_mnrs version 1.2.1
+* SPDX-License-Identifier: Apache-2.0
+*
+* Generated at 2024-02-08 14:41:42 UTC 
+* by peakrdl_mnrs version 1.2.2
 */
 
 #ifndef _APB3ACLINT_H_
@@ -71,4 +73,4 @@ template <unsigned BUSWIDTH> inline void Apb3AClint_regs::registerResources(scc:
 }
 }//namespace minres
 }//namespace vpvper
-#endif // _APB3ACLINT_H_
+#endif // _APB3ACLINT_H_
diff --git a/minres/gen/Apb3Gpio_regs.h b/minres/gen/Apb3Gpio_regs.h
@@ -1,8 +1,10 @@
 /*
-* Copyright (c) 2024 MINRES Technologies GmbH
+* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
 *
-* Generated at 2024-02-08 12:22:11 UTC 
-* by peakrdl_mnrs version 1.2.1
+* SPDX-License-Identifier: Apache-2.0
+*
+* Generated at 2024-02-08 14:41:42 UTC 
+* by peakrdl_mnrs version 1.2.2
 */
 
 #ifndef _APB3GPIO_H_
@@ -59,4 +61,4 @@ template <unsigned BUSWIDTH> inline void Apb3Gpio_regs::registerResources(scc::t
 }
 }//namespace minres
 }//namespace vpvper
-#endif // _APB3GPIO_H_
+#endif // _APB3GPIO_H_
diff --git a/minres/gen/Apb3IrqCtrl_regs.h b/minres/gen/Apb3IrqCtrl_regs.h
@@ -1,8 +1,10 @@
 /*
-* Copyright (c) 2024 MINRES Technologies GmbH
+* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
 *
-* Generated at 2024-02-08 12:22:11 UTC 
-* by peakrdl_mnrs version 1.2.1
+* SPDX-License-Identifier: Apache-2.0
+*
+* Generated at 2024-02-08 14:41:42 UTC 
+* by peakrdl_mnrs version 1.2.2
 */
 
 #ifndef _APB3IRQCTRL_H_
@@ -58,4 +60,4 @@ template <unsigned BUSWIDTH> inline void Apb3IrqCtrl_regs::registerResources(scc
 }
 }//namespace minres
 }//namespace vpvper
-#endif // _APB3IRQCTRL_H_
+#endif // _APB3IRQCTRL_H_
diff --git a/minres/gen/Apb3SpiXdrMasterCtrl_regs.h b/minres/gen/Apb3SpiXdrMasterCtrl_regs.h
@@ -1,8 +1,10 @@
 /*
-* Copyright (c) 2024 MINRES Technologies GmbH
+* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
 *
-* Generated at 2024-02-08 12:22:11 UTC 
-* by peakrdl_mnrs version 1.2.1
+* SPDX-License-Identifier: Apache-2.0
+*
+* Generated at 2024-02-08 14:41:42 UTC 
+* by peakrdl_mnrs version 1.2.2
 */
 
 #ifndef _APB3SPIXDRMASTERCTRL_H_
@@ -165,4 +167,4 @@ template <unsigned BUSWIDTH> inline void Apb3SpiXdrMasterCtrl_regs::registerReso
 }
 }//namespace minres
 }//namespace vpvper
-#endif // _APB3SPIXDRMASTERCTRL_H_
+#endif // _APB3SPIXDRMASTERCTRL_H_
diff --git a/minres/gen/Apb3Timer_regs.h b/minres/gen/Apb3Timer_regs.h
@@ -1,8 +1,10 @@
 /*
-* Copyright (c) 2024 MINRES Technologies GmbH
+* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
 *
-* Generated at 2024-02-08 12:22:11 UTC 
-* by peakrdl_mnrs version 1.2.1
+* SPDX-License-Identifier: Apache-2.0
+*
+* Generated at 2024-02-08 14:41:42 UTC 
+* by peakrdl_mnrs version 1.2.2
 */
 
 #ifndef _APB3TIMER_H_
@@ -87,4 +89,4 @@ template <unsigned BUSWIDTH> inline void Apb3Timer_regs::registerResources(scc::
 }
 }//namespace minres
 }//namespace vpvper
-#endif // _APB3TIMER_H_
+#endif // _APB3TIMER_H_
diff --git a/minres/gen/Apb3Uart_regs.h b/minres/gen/Apb3Uart_regs.h
@@ -1,8 +1,10 @@
 /*
-* Copyright (c) 2024 MINRES Technologies GmbH
+* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
 *
-* Generated at 2024-02-08 12:22:11 UTC 
-* by peakrdl_mnrs version 1.2.1
+* SPDX-License-Identifier: Apache-2.0
+*
+* Generated at 2024-02-08 14:41:42 UTC 
+* by peakrdl_mnrs version 1.2.2
 */
 
 #ifndef _APB3UART_H_
@@ -91,4 +93,4 @@ template <unsigned BUSWIDTH> inline void Apb3Uart_regs::registerResources(scc::t
 }
 }//namespace minres
 }//namespace vpvper
-#endif // _APB3UART_H_
+#endif // _APB3UART_H_
diff --git a/minres/qspi.cpp b/minres/qspi.cpp
@@ -20,6 +20,7 @@ qspi::qspi(sc_core::sc_module_name nm)
 , tlm_target<>(clk_period)
 , NAMEDD(regs, Apb3SpiXdrMasterCtrl_regs)
 {
+    xip_sck(flash_mem.target);
     regs->registerResources(*this);
     SC_METHOD(reset_cb);
     sensitive << rst_i;
@@ -39,10 +40,9 @@ void qspi::reset_cb() {
     } else {
         regs->reset_stop();
     }
-    for(auto i=0U; i<32; ++i){
-        dq_o[i].write(false);
-        oe_o[i].write(false);
-    }
+
+    for(auto& p: dq_o)p->write(false);
+    for(auto& p: oe_o)p->write(false);
 }
 } /* namespace minres */
 } /* namespace vpvper */
diff --git a/minres/qspi.h b/minres/qspi.h
@@ -10,6 +10,7 @@
 #include <scc/tlm_target.h>
 #include <scc/clock_if_mixins.h>
 #include <sysc/communication/sc_signal_ports.h>
+#include <scc/memory.h>
 
 namespace vpvper {
 namespace minres {
@@ -32,7 +33,7 @@ class qspi : public sc_core::sc_module, public scc::tlm_target<> {
 
     sc_core::sc_out<bool> irq_o{"irq_o"};
 
-    tlm::scc::target_mixin<tlm::tlm_target_socket<scc::LT>> xip_sck{"xip_sck"};
+    tlm::tlm_target_socket<scc::LT> xip_sck{"xip_sck"};
 
     qspi(sc_core::sc_module_name nm);
 
@@ -46,6 +47,8 @@ class qspi : public sc_core::sc_module, public scc::tlm_target<> {
     void reset_cb();
     sc_core::sc_time clk_period;
     std::unique_ptr<Apb3SpiXdrMasterCtrl_regs> regs;
+    scc::memory<16_MB, scc::LT> flash_mem {"flash_mem"};
+
 };
 
 using qspi_tl = scc::tickless_clock<qspi>;

diff --git a/minres/timer.cpp b/minres/timer.cpp
@@ -139,12 +139,12 @@ void timer::update_counter(unsigned idx) {
     auto any_tick = (enable & 1) && prescaler_tick_evt.triggered();
 
     auto mask = 1U;
-    for (auto pin : clear_i) {
+    for (auto& pin : clear_i) {
         any_clear |= (clear & mask) && pin->posedge();
         mask <<= 1;
     }
     mask = 2U;
-    for (auto pin : tick_i) {
+    for (auto& pin : tick_i) {
         any_tick |= (clear & mask) && pin->posedge();
         mask <<= 1;
     }

diff --git a/minres/uart.cpp b/minres/uart.cpp
@@ -47,6 +47,7 @@ uart::uart(sc_core::sc_module_name nm)
                 update_irq();
             } else
                 regs->r_rx_tx_reg.rx_avail=0;
+            regs->r_rx_tx_reg.tx_free = tx_fifo.num_free() != 0;
             data = reg.get() & reg.rdmask;
         }
         return true;