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Initial code dump of MIAOW sources and scripts.
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@zwabbit
zwabbit committed Sep 25, 2014
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1 change: 1 addition & 0 deletions .gitignore
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.project
27 changes: 27 additions & 0 deletions COPYING
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Copyright (c) 2014, Vertical Research Group, University of Wisconsin-Madison
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.

2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.

3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
253 changes: 253 additions & 0 deletions scripts/veriperl.pl
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#!/usr/bin/perl -w

use warnings "all";
use Getopt::Long;

#*****************************SECTION 0**********************************
#Summary of script function
#-Read and parse the input file
#-Identify each embedded perl section and do the following
#--Create a perl script
#--Run the perl script
#--Append the output of the script to the output file
#************************************************************************

#*****************************SECTION I**********************************
#Declaration and initialization of variables
my $infile = "";
my $outfile = "";
my $help = 0;
my $release = 0;
my $opt_result;
my $script_name = $0;
my @stat_infile;
my @stat_outfile;
my @stat_script;
my @input_file;
my $perl_script;
my $input_file_size;
my $i;
my @outfile_contents = ();
my @perlfile_contents = ();
my $parse_status;
my $perlsection_count;
my $perlfile;
my $perlfile_output;
my @perl_output;
my $printlineno_1;
my $printlineno_2;
#************************************************************************

#*****************************SECTION II*********************************
#Parse command line arguments and check for sanity of command line arguments
$opt_result = GetOptions (
"infile=s" => \$infile,
"outfile=s" => \$outfile,
"help" => \$help,
"release" => \$release
);

if(!$opt_result)
{
print STDERR "$script_name: Invalid command line options!\n";
print STDERR "$script_name: Use -help if you need it :)\n";
die;
}
if($help)
{
print_help();
exit 0;
}
if($infile eq "")
{
print STDERR "$script_name: Compulsory option -infile is missing!\n";
print STDERR "$script_name: Use -help if you need it :)\n";
die;
}
if($outfile eq "")
{
print STDERR "$script_name: Compulsory option -outfile is missing!\n";
print STDERR "$script_name: Use -help if you need it :)\n";
die;
}
if(!(-e $infile))
{
print STDERR "$script_name: Input file $infile does not exist!\n";
die;
}
if(-e $outfile)
{
@stat_script = stat($script_name);
@stat_infile = stat($infile);
@stat_outfile = stat($outfile);
if(($stat_infile[1] == $stat_outfile[1]) && ($stat_infile[0] == $stat_outfile[0]))
{
print STDERR "$script_name: Input file should not be same as output file!\n";
die;
}
if(($stat_script[1] == $stat_outfile[1]) && ($stat_script[0] == $stat_outfile[0]))
{
print STDERR "$script_name: The script should not be same as output file!\n";
die;
}
}
#************************************************************************

#*****************************SECTION III********************************
#This is the functional part of the script

#Read the contents of the input file
if(0 == open(INFILE, "$infile"))
{
print STDERR "$script_name: Cannot open $infile for reading!\n";
die;
}
@input_file = <INFILE>;
close(INFILE);
$input_file_size = scalar(@input_file);

#$parse_status takes the value "verilog" if we are in a section of regular verilog code
#If in an embedded perl section, $parse_status takes the value of the starting
#line number of the perl section
$parse_status = "verilog";
$perlsection_count = 0;
#Loop to iterate over and process each line of the input file
for($i=0; $i<$input_file_size; $i=$i+1)
{
$line = $input_file[$i];
#For line marking the beginning of an embedded perl section
if($line =~ m/^%%start_veriperl/)
{
$parse_status = "$i";
@perlfile_contents = ();
if(!$release)
{
push(@outfile_contents, "// $line");
}
#Loop to iterate until we reach the end of the perl section or end of the input file
for($i=$i+1 ; $i<$input_file_size; $i=$i+1)
{
$line = $input_file[$i];
if(!$release)
{
push(@outfile_contents, "// $line");
}
if($line =~ m/^%%start_veriperl/)
{
$printlineno_1 = $i + 1;
$printlineno_2 = $parse_status + 1;
print STDERR "$script_name: %%start_veriperl at line $printlineno_1 occurs within a veriperl section starting at line $printlineno_2!\n";
die;
}
#If the script sees the end of the perl section
elsif($line =~ m/^%%stop_veriperl/)
{
$parse_status = "verilog";
$perlsection_count = $perlsection_count + 1;
#Call the run_perl function
run_perl();
last;
}
#For a regular perl line in the ebedded perl section, keep pushing to an array
else
{
push(@perlfile_contents, "$line");
}
}
}
#%%stop_veriperl should not be seen before %%start_veriperl
elsif($line =~ m/^%%stop_veriperl/)
{
$printlineno_1 = $i + 1;
print STDERR "$script_name: %%stop_veriperl at line $printlineno_1 is not matched by an earlier %%start_veriperl!\n";
die;
}
#For lines which are part of regular verilog code, push them to an array
else
{
push(@outfile_contents, "$line");
}
}

#If $parse_status is not verilog, there is an unterminated perl section
if(!($parse_status eq "verilog"))
{
$printlineno_1 = $parse_status + 1;
print STDERR "$script_name: %%start_veriperl at line $printlineno_1 is not matched by a later %%stop_veriperl!\n";
die;
}

#Open the output file and print the output
if (0 == open(OUTFILE, ">$outfile"))
{
print STDERR "$script_name: Cannot open $outfile for writing!\n";
die;
}
print OUTFILE @outfile_contents;
close(OUTFILE);
#************************************************************************

#*****************************SECTION IV*********************************
#Function for creating perl scripts and running them
sub run_perl
{
#Create a perl file for dumping the contents of the embedded perl section in verilog
$perlfile = "$outfile-veriperl-$perlsection_count.pl";
if (0 == open(PERLFILE, ">$perlfile"))
{
print STDERR "$script_name: Cannot open $perlfile for writing!\n";
die;
}
#Header for the embedded perl file
print PERLFILE qq{#!/usr/bin/perl -w
use warnings "all";
};
print PERLFILE @perlfile_contents;
close(PERLFILE);
#Setup the script output file, set execute permissions, run the script
$perlfile_output = "$perlfile.out";
`chmod u+x $perlfile`;
`./$perlfile > $perlfile_output`;
#Read the output generated by the embedded perl script
if (0 == open(PERLOUT, "$perlfile_output"))
{
print STDERR "$script_name: Cannot open $perlfile_output for reading!\n";
die;
}
@perl_output = <PERLOUT>;
close(PERLOUT);
`rm -f $perlfile $perlfile_output`;
#Append the output of the embedded perl to the output verilog file
@outfile_contents = (@outfile_contents, @perl_output);
}
#************************************************************************

#*****************************SECTION V**********************************
#Function for printing help message
sub print_help
{
print STDOUT qq{$script_name:
DESCRIPTION:
This script can parse pseudo verilog files with embedded perl code and generate verilog code as the output. The embedded verilog code in the input file should be enclosed within %%start_veriperl and %%stop_veriperl.
USAGE:
$script_name -i <input_file_name> -o <output_file_name> [-r] [-h]
ARGUMENTS:
-i
-infile <input_file_name> This is a compulsory option; used to specify the name of the pseudo verilog input file.
-o
-outfile <output_file_name> This is a compulsory option; used to specify the name of the output verilog file.
-r
-release With this option, the output file will not have comments generated by veriperl. This option can be used for releasing verilog.
-h
-help Well, you know what this option is for! You couldn't be reading this otherwise.
};
}
#************************************************************************
85 changes: 85 additions & 0 deletions scripts/xilinx/miaow_v2_1_0.mpd
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###################################################################
##
## Name : miaow
## Desc : Microprocessor Peripheral Description
## : Automatically generated by PsfUtility
##
###################################################################

BEGIN miaow

## Peripheral Options
OPTION IPTYPE = PERIPHERAL
OPTION IMP_NETLIST = TRUE
OPTION HDL = MIXED
OPTION IP_GROUP = MICROBLAZE:USER
OPTION DESC = MIAOW
OPTION ARCH_SUPPORT_MAP = (others=DEVELOPMENT)


## Bus Interfaces
BUS_INTERFACE BUS = S_AXI, BUS_STD = AXI, BUS_TYPE = SLAVE

## Generics for VHDL or Parameters for Verilog
PARAMETER C_S_AXI_DATA_WIDTH = 32, DT = INTEGER, BUS = S_AXI, ASSIGNMENT = CONSTANT
PARAMETER C_S_AXI_ADDR_WIDTH = 32, DT = INTEGER, BUS = S_AXI, ASSIGNMENT = CONSTANT
PARAMETER C_S_AXI_ID_WIDTH = 4, DT = INTEGER, BUS = S_AXI
PARAMETER C_RDATA_FIFO_DEPTH = 0, DT = INTEGER
PARAMETER C_INCLUDE_TIMEOUT_CNT = 1, DT = INTEGER
PARAMETER C_TIMEOUT_CNTR_VAL = 8, DT = INTEGER
PARAMETER C_ALIGN_BE_RDADDR = 0, DT = INTEGER
PARAMETER C_S_AXI_SUPPORTS_WRITE = 1, DT = INTEGER, BUS = S_AXI
PARAMETER C_S_AXI_SUPPORTS_READ = 1, DT = INTEGER, BUS = S_AXI
PARAMETER C_FAMILY = virtex6, DT = STRING
PARAMETER C_S_AXI_MEM0_BASEADDR = 0xffffffff, DT = std_logic_vector, CACHEABLE = TRUE, PAIR = C_S_AXI_MEM0_HIGHADDR, ADDRESS = BASE, BUS = S_AXI
PARAMETER C_S_AXI_MEM0_HIGHADDR = 0x00000000, DT = std_logic_vector, PAIR = C_S_AXI_MEM0_BASEADDR, ADDRESS = HIGH, BUS = S_AXI
PARAMETER C_S_AXI_MEM1_BASEADDR = 0xffffffff, DT = std_logic_vector, CACHEABLE = TRUE, PAIR = C_S_AXI_MEM1_HIGHADDR, ADDRESS = BASE, BUS = S_AXI
PARAMETER C_S_AXI_MEM1_HIGHADDR = 0x00000000, DT = std_logic_vector, PAIR = C_S_AXI_MEM1_BASEADDR, ADDRESS = HIGH, BUS = S_AXI
PARAMETER C_S_AXI_MEM2_BASEADDR = 0xffffffff, DT = std_logic_vector, CACHEABLE = TRUE, PAIR = C_S_AXI_MEM2_HIGHADDR, ADDRESS = BASE, BUS = S_AXI
PARAMETER C_S_AXI_MEM2_HIGHADDR = 0x00000000, DT = std_logic_vector, PAIR = C_S_AXI_MEM2_BASEADDR, ADDRESS = HIGH, BUS = S_AXI
PARAMETER C_S_AXI_MEM3_BASEADDR = 0xffffffff, DT = std_logic_vector, CACHEABLE = TRUE, PAIR = C_S_AXI_MEM3_HIGHADDR, ADDRESS = BASE, BUS = S_AXI
PARAMETER C_S_AXI_MEM3_HIGHADDR = 0x00000000, DT = std_logic_vector, PAIR = C_S_AXI_MEM3_BASEADDR, ADDRESS = HIGH, BUS = S_AXI
PARAMETER C_S_AXI_MEM4_BASEADDR = 0xffffffff, DT = std_logic_vector, CACHEABLE = TRUE, PAIR = C_S_AXI_MEM4_HIGHADDR, ADDRESS = BASE, BUS = S_AXI
PARAMETER C_S_AXI_MEM4_HIGHADDR = 0x00000000, DT = std_logic_vector, PAIR = C_S_AXI_MEM4_BASEADDR, ADDRESS = HIGH, BUS = S_AXI
PARAMETER C_S_AXI_PROTOCOL = AXI4, TYPE = NON_HDL, ASSIGNMENT = CONSTANT, DT = STRING, BUS = S_AXI

## Ports
PORT S_AXI_ACLK = "", DIR = I, SIGIS = CLK, BUS = S_AXI
PORT S_AXI_ARESETN = ARESETN, DIR = I, SIGIS = RST, BUS = S_AXI
PORT S_AXI_AWADDR = AWADDR, DIR = I, VEC = [(C_S_AXI_ADDR_WIDTH-1):0], ENDIAN = LITTLE, BUS = S_AXI
PORT S_AXI_AWVALID = AWVALID, DIR = I, BUS = S_AXI
PORT S_AXI_WDATA = WDATA, DIR = I, VEC = [(C_S_AXI_DATA_WIDTH-1):0], ENDIAN = LITTLE, BUS = S_AXI
PORT S_AXI_WSTRB = WSTRB, DIR = I, VEC = [((C_S_AXI_DATA_WIDTH/8)-1):0], ENDIAN = LITTLE, BUS = S_AXI
PORT S_AXI_WVALID = WVALID, DIR = I, BUS = S_AXI
PORT S_AXI_BREADY = BREADY, DIR = I, BUS = S_AXI
PORT S_AXI_ARADDR = ARADDR, DIR = I, VEC = [(C_S_AXI_ADDR_WIDTH-1):0], ENDIAN = LITTLE, BUS = S_AXI
PORT S_AXI_ARVALID = ARVALID, DIR = I, BUS = S_AXI
PORT S_AXI_RREADY = RREADY, DIR = I, BUS = S_AXI
PORT S_AXI_ARREADY = ARREADY, DIR = O, BUS = S_AXI
PORT S_AXI_RDATA = RDATA, DIR = O, VEC = [(C_S_AXI_DATA_WIDTH-1):0], ENDIAN = LITTLE, BUS = S_AXI
PORT S_AXI_RRESP = RRESP, DIR = O, VEC = [1:0], BUS = S_AXI
PORT S_AXI_RVALID = RVALID, DIR = O, BUS = S_AXI
PORT S_AXI_WREADY = WREADY, DIR = O, BUS = S_AXI
PORT S_AXI_BRESP = BRESP, DIR = O, VEC = [1:0], BUS = S_AXI
PORT S_AXI_BVALID = BVALID, DIR = O, BUS = S_AXI
PORT S_AXI_AWREADY = AWREADY, DIR = O, BUS = S_AXI
PORT S_AXI_AWID = AWID, DIR = I, VEC = [(C_S_AXI_ID_WIDTH-1):0], ENDIAN = LITTLE, BUS = S_AXI
PORT S_AXI_AWLEN = AWLEN, DIR = I, VEC = [7:0], BUS = S_AXI
PORT S_AXI_AWSIZE = AWSIZE, DIR = I, VEC = [2:0], BUS = S_AXI
PORT S_AXI_AWBURST = AWBURST, DIR = I, VEC = [1:0], BUS = S_AXI
PORT S_AXI_AWLOCK = AWLOCK, DIR = I, BUS = S_AXI
PORT S_AXI_AWCACHE = AWCACHE, DIR = I, VEC = [3:0], BUS = S_AXI
PORT S_AXI_AWPROT = AWPROT, DIR = I, VEC = [2:0], BUS = S_AXI
PORT S_AXI_WLAST = WLAST, DIR = I, BUS = S_AXI
PORT S_AXI_BID = BID, DIR = O, VEC = [(C_S_AXI_ID_WIDTH-1):0], ENDIAN = LITTLE, BUS = S_AXI
PORT S_AXI_ARID = ARID, DIR = I, VEC = [(C_S_AXI_ID_WIDTH-1):0], ENDIAN = LITTLE, BUS = S_AXI
PORT S_AXI_ARLEN = ARLEN, DIR = I, VEC = [7:0], BUS = S_AXI
PORT S_AXI_ARSIZE = ARSIZE, DIR = I, VEC = [2:0], BUS = S_AXI
PORT S_AXI_ARBURST = ARBURST, DIR = I, VEC = [1:0], BUS = S_AXI
PORT S_AXI_ARLOCK = ARLOCK, DIR = I, BUS = S_AXI
PORT S_AXI_ARCACHE = ARCACHE, DIR = I, VEC = [3:0], BUS = S_AXI
PORT S_AXI_ARPROT = ARPROT, DIR = I, VEC = [2:0], BUS = S_AXI
PORT S_AXI_RID = RID, DIR = O, VEC = [(C_S_AXI_ID_WIDTH-1):0], ENDIAN = LITTLE, BUS = S_AXI
PORT S_AXI_RLAST = RLAST, DIR = O, BUS = S_AXI
PORT CLK_DOUBLE = "", DIR = I, SIGIS = CLK
END

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