[spectext] Add i16x8.qmulr_sat_s

This was merged in #365.
WebAssembly · Feb 17, 2021 · 2d191fe · 2d191fe
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diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py
@@ -457,6 +457,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat
     Instruction(r'\I16X8.\VMAX\K{\_s}', r'\hex{FD}~~152', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'),
     Instruction(r'\I16X8.\VMAX\K{\_u}', r'\hex{FD}~~153', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'),
     Instruction(r'\I16X8.\AVGR\K{\_u}', r'\hex{FD}~~155', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'),
+    Instruction(r'\I16X8.\Q15MULRSAT\K{\_s}', r'\hex{FD}~~156', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iq15mulrsat_s'),
     Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_s}', r'\hex{FD}~~154', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'),
     Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_s}', r'\hex{FD}~~157', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'),
     Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_u}', r'\hex{FD}~~158', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'),

diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst
diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst
@@ -651,6 +651,7 @@ All other SIMD instructions are plain opcodes without any immediates.
      \hex{FD}~~153{:}\Bu32 &\Rightarrow& \I16X8.\VMAX\K{\_u} \\ &&|&
      \hex{FD}~~155{:}\Bu32 &\Rightarrow& \I16X8.\AVGR\K{\_u} \\ &&|&
      \hex{FD}~~154{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_s}\\ &&|&
+     \hex{FD}~~156{:}\Bu32 &\Rightarrow& \I16X8.\Q15MULRSAT\K{\_s} \\ &&|&
      \hex{FD}~~157{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_s}\\ &&|&
      \hex{FD}~~158{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_u}\\ &&|&
      \hex{FD}~~159{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_u}\\

diff --git a/document/core/exec/numerics.rst b/document/core/exec/numerics.rst
@@ -897,7 +897,7 @@ The integer result of predicates -- i.e., :ref:`tests <syntax-testop>` and :ref:
 .. _op-iavgr_u:
 
 :math:`\iavgru_N(i_1, i_2)`
-.............................
+...........................
 
 * Let :math:`j` be the result of adding :math:`i_1`, :math:`i_2`, and :math:`1`.
 
@@ -909,6 +909,17 @@ The integer result of predicates -- i.e., :ref:`tests <syntax-testop>` and :ref:
    \end{array}
 
 
+.. _op-iq15mulrsat_s:
+
+:math:`\iq15mulrsats_N(i_1, i_2)`
+.................................
+
+* Return the result of :math:`\sats_N(\ishrs_N(i_1 \cdot i_2 + 2^{14}, 15))`.
+
+.. math::
+   \begin{array}{lll@{\qquad}l}
+   \iq15mulrsats_N(i_1, i_2) &=& \sats_N(\ishrs_N(i_1 \cdot i_2 + 2^{14}, 15))
+   \end{array}
 
 
 .. index:: floating-point, IEEE 754

diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst
@@ -236,6 +236,7 @@ SIMD instructions provide basic operations over :ref:`values <syntax-value>` of
      \K{i32x4.}\viunop ~|~
      \K{i64x2.}\viunop \\&&|&
      \K{i8x16.}\VPOPCNT \\&&|&
+     \K{i16x8.}\Q15MULRSAT\K{\_s} \\ &&|&
      \fshape\K{.}\vfunop \\&&|&
      \ishape\K{.}\vitestop \\ &&|&
      \ishape\K{.}\BITMASK \\ &&|&
@@ -390,7 +391,8 @@ Occasionally, it is convenient to group operators together according to the foll
      \viminmaxop ~|~ \visatbinop \\&&|&
      \SWIZZLE ~|~
      \VMUL ~|~
-     \AVGR\K{\_u} \\
+     \AVGR\K{\_u} ~|~
+     \Q15MULRSAT\K{\_s} \\
    \production{conversion operator} & \vcvtop &::=&
      \VTRUNC\K{\_sat} ~|~
      \VCONVERT \\

diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst
@@ -684,6 +684,7 @@ SIMD const instructions have a mandatory :ref:`shape <syntax-simd-shape>` descri
      \text{i16x8.max\_s} &\Rightarrow& \I16X8.\VMAX\K{\_s}\\ &&|&
      \text{i16x8.max\_u} &\Rightarrow& \I16X8.\VMAX\K{\_u}\\ &&|&
      \text{i16x8.avgr\_u} &\Rightarrow& \I16X8.\AVGR\K{\_u}\\ &&|&
+     \text{i16x8.q15mulr\_sat\_s} &\Rightarrow& \I16X8.\Q15MULRSAT\K{\_s}\\ &&|&
      \text{i16x8.extmul\_low\_i8x16\_s} &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_s}\\ &&|&
      \text{i16x8.extmul\_high\_i8x16\_s} &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_s}\\ &&|&
      \text{i16x8.extmul\_low\_i8x16\_u} &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_u}\\ &&|&

diff --git a/document/core/util/macros.def b/document/core/util/macros.def
@@ -426,6 +426,7 @@
 .. |EXTMUL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extmul}}
 .. |VTRUNC| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{trunc}}
 .. |VCONVERT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{convert}}
+.. |Q15MULRSAT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{q15mulr\_sat}}
 
 
 .. Instructions, non-terminals
@@ -1033,6 +1034,7 @@
 .. |isubsatu| mathdef:: \xref{exec/numerics}{op-isubsat_u}{\F{isubsat\_u}}
 .. |isubsats| mathdef:: \xref{exec/numerics}{op-isubsat_s}{\F{isubsat\_s}}
 .. |iavgru| mathdef:: \xref{exec/numerics}{op-iavgr_u}{\F{iavgr\_u}}
+.. |iq15mulrsats| mathdef:: \xref{exec/numerics}{op-iq15mulrsat_s}{\F{iq15mulrsat\_s}}
 
 .. |fadd| mathdef:: \xref{exec/numerics}{op-fadd}{\F{fadd}}
 .. |fsub| mathdef:: \xref{exec/numerics}{op-fsub}{\F{fsub}}