i16x8.q15rmul_sat_s instruction

WebAssembly · Jan 11, 2021 · fe17145 · fe17145
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diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md
@@ -161,7 +161,7 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
 | `i16x8.min_u`               |    `0x97`| -                  |
 | `i16x8.max_s`               |    `0x98`| -                  |
 | `i16x8.max_u`               |    `0x99`| -                  |
-| `i16x8.avgr_u`              |    `0x9b`|                    |
+| `i16x8.avgr_u`              |    `0x9b`| -                  |
 | `i32x4.abs`                 |    `0xa0`| -                  |
 | `i32x4.neg`                 |    `0xa1`| -                  |
 | `i32x4.any_true`            |    `0xa2`| -                  |
@@ -237,3 +237,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
 | `i64x2.extmul_high_i32x4_s` |   `0x119`| -                  |
 | `i64x2.extmul_low_i32x4_u`  |   `0x11a`| -                  |
 | `i64x2.extmul_high_i32x4_u` |   `0x11b`| -                  |
+| `i16x8.q15mulr_sat_s`       |     `TBD`| -                  |
diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md
@@ -130,6 +130,7 @@
 | `i16x8.max_s`               |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i16x8.max_u`               |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i16x8.avgr_u`              |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
+| `i16x8.q15mulr_sat_s`       |                           |                    |                    |                    |                    |
 | `i32x4.abs`                 |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i32x4.neg`                 |               `-msimd128` | :heavy_check_mark: |                    | :heavy_check_mark: | :heavy_check_mark: |
 | `i32x4.any_true`            |               `-msimd128` | :heavy_check_mark: |                    | :heavy_check_mark: | :heavy_check_mark: |

diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md
@@ -108,6 +108,7 @@
 | i8x16.max_u          | 0x79   | i16x8.max_u              | 0x99   | i32x4.max_u              | 0xb9   | ----        | 0xd9   |
 | ----------------     | 0x7a   | ----------------         | 0x9a   | i32x4.dot_i16x8_s        | 0xba   | ----        | 0xda   |
 | i8x16.avgr_u         | 0x7b   | i16x8.avgr_u             | 0x9b   | ---- avgr_u ----         | 0xbb   | ----        | 0xdb   |
+| ----                 | 0x7c   | i16x8.q15mulr_sat_s      | 0x9c   | ----                     | 0xbc   | ----        | 0xdc   |
 
 | f32x4 Op        | opcode | f64x2 Op        | opcode |
 | --------------- | ------ | --------------- | ------ |

diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md
@@ -509,6 +509,19 @@ def S.sub_sat_u(a, b):
     return S.lanewise_binary(subsat, S.AsUnsigned(a), S.AsUnsigned(b))
 ```
 
+### Saturating integer Q-format rounding multiplication
+
+* `i16x8.q15mulr_sat_s(a: v128, b: v128) -> v128`
+
+Lane-wise saturating rounding multiplication in Q15 format:
+
+```python
+def S.q15mulr_sat_s(a, b):
+    def subq15mulr(x, y):
+        return S.SignedSaturate((x * y + 0x4000) >> 15)
+    return S.lanewise_binary(subsat, S.AsSigned(a), S.AsSigned(b))
+```
+
 ### Lane-wise integer minimum
 * `i8x16.min_s(a: v128, b: v128) -> v128`
 * `i8x16.min_u(a: v128, b: v128) -> v128`