Use NodeName and Namespace in CSS JIT

https://bugs.webkit.org/show_bug.cgi?id=267671 rdar://121167170 Reviewed by Ryosuke Niwa and Justin Michaud. 1. Use NodeName in CSS JIT code generation. This is more efficient and we can reduce code size. 2. Drop Darwin ARMv7 CSS JIT since it is no longer used. 3. We adjust registers so that this patch removes weird configuration of Assemblers in CSS JIT (what registers are reserved etc.). * Source/JavaScriptCore/assembler/MacroAssembler.h: (JSC::MacroAssembler::patchableBranch16): * Source/JavaScriptCore/assembler/MacroAssemblerARM64.h: (JSC::MacroAssemblerARM64::branch16): (JSC::MacroAssemblerARM64::patchableBranch16): * Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h: (JSC::MacroAssemblerARMv7::branch16): (JSC::MacroAssemblerARMv7::patchableBranch16): * Source/JavaScriptCore/assembler/MacroAssemblerRISCV64.h: (JSC::MacroAssemblerRISCV64::branch16): * Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h: (JSC::MacroAssemblerX86Common::branch16): (JSC::MacroAssemblerX86Common::branch8): * Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h: (JSC::MacroAssemblerX86_64::branch16): * Source/WTF/wtf/PlatformEnable.h: * Source/WebCore/cssjit/SelectorCompiler.cpp: (WebCore::SelectorCompiler::SelectorCodeGenerator::generateElementAttributeMatching): (WebCore::SelectorCompiler::SelectorCodeGenerator::generateElementHasTagName): * Source/WebCore/dom/QualifiedName.h: (WebCore::QualifiedName::QualifiedNameImpl::namespaceMemoryOffset): (WebCore::QualifiedName::QualifiedNameImpl::nodeNameMemoryOffset): (WebCore::QualifiedName::QualifiedNameImpl::namespaceURIMemoryOffset): Canonical link: https://commits.webkit.org/276663@main
WebKit · Mar 26, 2024 · 6aefea9 · 6aefea9
1 parent 508e180
commit 6aefea9
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diff --git a/Source/JavaScriptCore/assembler/MacroAssembler.h b/Source/JavaScriptCore/assembler/MacroAssembler.h
@@ -496,6 +496,12 @@ class MacroAssembler : public MacroAssemblerBase {
         return PatchableJump(branch8(cond, address, imm));
     }
 
+    PatchableJump patchableBranch16(RelationalCondition cond, Address address, TrustedImm32 imm)
+    {
+        padBeforePatch();
+        return PatchableJump(branch16(cond, address, imm));
+    }
+
     PatchableJump patchableBranch32(RelationalCondition cond, Address address, TrustedImm32 imm)
     {
         padBeforePatch();

diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h b/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h
@@ -3879,14 +3879,35 @@ class MacroAssemblerARM64 : public AbstractMacroAssembler<Assembler> {
         MacroAssemblerHelpers::load8OnCondition(*this, cond, left, getCachedMemoryTempRegisterIDAndInvalidate());
         return branch32(cond, memoryTempRegister, right8);
     }
-    
+
     Jump branch8(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
     {
         TrustedImm32 right8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, right);
         MacroAssemblerHelpers::load8OnCondition(*this, cond, left.m_ptr, getCachedMemoryTempRegisterIDAndInvalidate());
         return branch32(cond, memoryTempRegister, right8);
     }
-
+
+    Jump branch16(RelationalCondition cond, Address left, TrustedImm32 right)
+    {
+        TrustedImm32 right16 = MacroAssemblerHelpers::mask16OnCondition(*this, cond, right);
+        MacroAssemblerHelpers::load16OnCondition(*this, cond, left, getCachedMemoryTempRegisterIDAndInvalidate());
+        return branch32(cond, memoryTempRegister, right16);
+    }
+
+    Jump branch16(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
+    {
+        TrustedImm32 right16 = MacroAssemblerHelpers::mask16OnCondition(*this, cond, right);
+        MacroAssemblerHelpers::load16OnCondition(*this, cond, left, getCachedMemoryTempRegisterIDAndInvalidate());
+        return branch32(cond, memoryTempRegister, right16);
+    }
+
+    Jump branch16(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
+    {
+        TrustedImm32 right16 = MacroAssemblerHelpers::mask16OnCondition(*this, cond, right);
+        MacroAssemblerHelpers::load16OnCondition(*this, cond, left.m_ptr, getCachedMemoryTempRegisterIDAndInvalidate());
+        return branch32(cond, memoryTempRegister, right16);
+    }
+
     Jump branchTest32(ResultCondition cond, RegisterID reg, RegisterID mask)
     {
         if (reg == mask && (cond == Zero || cond == NonZero))
@@ -4711,6 +4732,14 @@ class MacroAssemblerARM64 : public AbstractMacroAssembler<Assembler> {
         return PatchableJump(result);
     }
 
+    PatchableJump patchableBranch16(RelationalCondition cond, Address left, TrustedImm32 imm)
+    {
+        m_makeJumpPatchable = true;
+        Jump result = branch16(cond, left, imm);
+        m_makeJumpPatchable = false;
+        return PatchableJump(result);
+    }
+
     PatchableJump patchableBranchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
     {
         m_makeJumpPatchable = true;

diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h b/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h
@@ -2473,7 +2473,7 @@ class MacroAssemblerARMv7 : public AbstractMacroAssembler<Assembler> {
         MacroAssemblerHelpers::load8OnCondition(*this, cond, left, scratch);
         return branch32(cond, scratch, right8);
     }
-    
+
     Jump branch8(RelationalCondition cond, AbsoluteAddress address, TrustedImm32 right)
     {
         // Use addressTempRegister instead of dataTempRegister, since branch32 uses dataTempRegister.
@@ -2482,7 +2482,41 @@ class MacroAssemblerARMv7 : public AbstractMacroAssembler<Assembler> {
         MacroAssemblerHelpers::load8OnCondition(*this, cond, armAddress, addressTempRegister);
         return branch32(cond, addressTempRegister, right8);
     }
-
+
+    Jump branch16(RelationalCondition cond, RegisterID left, TrustedImm32 right)
+    {
+        TrustedImm32 right16 = MacroAssemblerHelpers::mask16OnCondition(*this, cond, right);
+        compare32AndSetFlags(left, right16);
+        return Jump(makeBranch(cond));
+    }
+
+    Jump branch16(RelationalCondition cond, Address left, TrustedImm32 right)
+    {
+        // use addressTempRegister incase the branch16 we call uses dataTempRegister. :-/
+        RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
+        TrustedImm32 right16 = MacroAssemblerHelpers::mask16OnCondition(*this, cond, right);
+        MacroAssemblerHelpers::load16OnCondition(*this, cond, left, scratch);
+        return branch16(cond, scratch, right16);
+    }
+
+    Jump branch16(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
+    {
+        // use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
+        RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
+        TrustedImm32 right16 = MacroAssemblerHelpers::mask16OnCondition(*this, cond, right);
+        MacroAssemblerHelpers::load16OnCondition(*this, cond, left, scratch);
+        return branch32(cond, scratch, right16);
+    }
+
+    Jump branch16(RelationalCondition cond, AbsoluteAddress address, TrustedImm32 right)
+    {
+        // Use addressTempRegister instead of dataTempRegister, since branch32 uses dataTempRegister.
+        TrustedImm32 right16 = MacroAssemblerHelpers::mask16OnCondition(*this, cond, right);
+        ArmAddress armAddress = setupArmAddress(address);
+        MacroAssemblerHelpers::load16OnCondition(*this, cond, armAddress, addressTempRegister);
+        return branch32(cond, addressTempRegister, right16);
+    }
+
     Jump branchTest32(ResultCondition cond, RegisterID reg, RegisterID mask)
     {
         ASSERT(cond == Zero || cond == NonZero || cond == Signed || cond == PositiveOrZero);
@@ -2979,6 +3013,14 @@ class MacroAssemblerARMv7 : public AbstractMacroAssembler<Assembler> {
         return PatchableJump(result);
     }
 
+    PatchableJump patchableBranch16(RelationalCondition cond, Address left, TrustedImm32 imm)
+    {
+        m_makeJumpPatchable = true;
+        Jump result = branch16(cond, left, imm);
+        m_makeJumpPatchable = false;
+        return PatchableJump(result);
+    }
+
     PatchableJump patchableBranch32(RelationalCondition cond, RegisterID reg, TrustedImm32 imm)
     {
         m_makeJumpPatchable = true;

diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerRISCV64.h b/Source/JavaScriptCore/assembler/MacroAssemblerRISCV64.h
@@ -2246,6 +2246,24 @@ class MacroAssemblerRISCV64 : public AbstractMacroAssembler<Assembler> {
         return makeBranch(cond, temp.memory(), temp.data());
     }
 
+    Jump branch16(RelationalCondition cond, Address address, TrustedImm32 imm)
+    {
+        auto temp = temps<Data, Memory>();
+        auto resolution = resolveAddress(address, temp.memory());
+        m_assembler.lhInsn(temp.memory(), resolution.base, Imm::I(resolution.offset));
+        loadImmediate(imm, temp.data());
+        return makeBranch(cond, temp.memory(), temp.data());
+    }
+
+    Jump branch16(RelationalCondition cond, AbsoluteAddress address, TrustedImm32 imm)
+    {
+        auto temp = temps<Data, Memory>();
+        loadImmediate(TrustedImmPtr(address.m_ptr), temp.memory());
+        m_assembler.lhInsn(temp.memory(), temp.memory(), Imm::I<0>());
+        loadImmediate(imm, temp.data());
+        return makeBranch(cond, temp.memory(), temp.data());
+    }
+
     Jump branch32(RelationalCondition cond, RegisterID lhs, RegisterID rhs)
     {
         auto temp = temps<Data, Memory>();

diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h b/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h
@@ -3008,6 +3008,13 @@ class MacroAssemblerX86Common : public AbstractMacroAssembler<Assembler> {
         return Jump(m_assembler.jCC(x86Condition(cond)));
     }
 
+    Jump branch16(RelationalCondition cond, Address left, TrustedImm32 right)
+    {
+        TrustedImm32 right16(static_cast<int16_t>(right.m_value));
+        m_assembler.cmpw_im(right16.m_value, left.offset, left.base);
+        return Jump(m_assembler.jCC(x86Condition(cond)));
+    }
+
     Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right)
     {
         m_assembler.cmpl_rr(right, left);
@@ -3182,6 +3189,13 @@ class MacroAssemblerX86Common : public AbstractMacroAssembler<Assembler> {
         return Jump(m_assembler.jCC(x86Condition(cond)));
     }
 
+    Jump branch16(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
+    {
+        TrustedImm32 right16(static_cast<int16_t>(right.m_value));
+        m_assembler.cmpw_im(right16.m_value, left.offset, left.base, left.index, left.scale);
+        return Jump(m_assembler.jCC(x86Condition(cond)));
+    }
+
     Jump jump()
     {
         return Jump(m_assembler.jmp());

diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h b/Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h
@@ -1947,6 +1947,13 @@ class MacroAssemblerX86_64 : public MacroAssemblerX86Common {
         return MacroAssemblerX86Common::branchTest8(cond, Address(scratchRegister()), mask8);
     }
 
+    using MacroAssemblerX86Common::branch16;
+    Jump branch16(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
+    {
+        MacroAssemblerX86Common::move(TrustedImmPtr(left.m_ptr), scratchRegister());
+        return MacroAssemblerX86Common::branch16(cond, Address(scratchRegister()), right);
+    }
+
     using MacroAssemblerX86Common::branchTest16;
     Jump branchTest16(ResultCondition cond, ExtendedAddress address, TrustedImm32 mask = TrustedImm32(-1))
     {

diff --git a/Source/WTF/wtf/PlatformEnable.h b/Source/WTF/wtf/PlatformEnable.h
@@ -866,7 +866,7 @@
 #endif
 
 /* CSS Selector JIT Compiler */
-#if !defined(ENABLE_CSS_SELECTOR_JIT) && ((CPU(X86_64) || CPU(ARM64) || (CPU(ARM_THUMB2) && OS(DARWIN))) && ENABLE(JIT) && (OS(DARWIN) || OS(WINDOWS) || PLATFORM(GTK) || PLATFORM(WPE)))
+#if !defined(ENABLE_CSS_SELECTOR_JIT) && ((CPU(X86_64) || CPU(ARM64)) && ENABLE(JIT) && (OS(DARWIN) || OS(WINDOWS) || PLATFORM(GTK) || PLATFORM(WPE)))
 #define ENABLE_CSS_SELECTOR_JIT 1
 #endif
 

diff --git a/Source/WebCore/cssjit/RegisterAllocator.h b/Source/WebCore/cssjit/RegisterAllocator.h
@@ -55,24 +55,6 @@ static const JSC::MacroAssembler::RegisterID calleeSavedRegisters[] = {
     JSC::ARM64Registers::x19
 };
 static const JSC::MacroAssembler::RegisterID tempRegister = JSC::ARM64Registers::x15;
-#elif CPU(ARM_THUMB2)
-static const JSC::MacroAssembler::RegisterID callerSavedRegisters[] {
-    JSC::ARMRegisters::r0,
-    JSC::ARMRegisters::r1,
-    JSC::ARMRegisters::r2,
-    JSC::ARMRegisters::r3,
-    JSC::ARMRegisters::r9,
-};
-static const JSC::MacroAssembler::RegisterID calleeSavedRegisters[] = {
-    JSC::ARMRegisters::r4,
-    JSC::ARMRegisters::r5,
-    JSC::ARMRegisters::r7,
-    JSC::ARMRegisters::r8,
-    JSC::ARMRegisters::r10,
-    JSC::ARMRegisters::r11,
-};
-// r6 is also used as addressTempRegister in the macro assembler. It is saved in the prologue and restored in the epilogue.
-static const JSC::MacroAssembler::RegisterID tempRegister = JSC::ARMRegisters::r6;
 #elif CPU(X86_64)
 #if !OS(WINDOWS)
 static const JSC::MacroAssembler::RegisterID callerSavedRegisters[] = {
@@ -84,7 +66,6 @@ static const JSC::MacroAssembler::RegisterID callerSavedRegisters[] = {
     JSC::X86Registers::r8,
     JSC::X86Registers::r9,
     JSC::X86Registers::r10,
-    JSC::X86Registers::r11
 };
 static const JSC::MacroAssembler::RegisterID calleeSavedRegisters[] = {
     JSC::X86Registers::r12,
@@ -100,7 +81,6 @@ static const JSC::MacroAssembler::RegisterID callerSavedRegisters[] = {
     JSC::X86Registers::r8,
     JSC::X86Registers::r9,
     JSC::X86Registers::r10,
-    JSC::X86Registers::r11
 };
 static const JSC::MacroAssembler::RegisterID calleeSavedRegisters[] = {
     JSC::X86Registers::esi,
@@ -212,11 +192,10 @@ class RegisterAllocator {
 #if CPU(ARM64)
         return (registerID >= JSC::ARM64Registers::x0 && registerID <= JSC::ARM64Registers::x14)
             || registerID == JSC::ARM64Registers::x19;
-#elif CPU(ARM_THUMB2)
-        return registerID >= JSC::ARMRegisters::r0 && registerID <= JSC::ARMRegisters::r11 && registerID != JSC::ARMRegisters::r6;
 #elif CPU(X86_64)
         return (registerID >= JSC::X86Registers::eax && registerID <= JSC::X86Registers::edx)
-            || (registerID >= JSC::X86Registers::esi && registerID <= JSC::X86Registers::r15);
+            || (registerID >= JSC::X86Registers::esi && registerID <= JSC::X86Registers::r10)
+            || (registerID >= JSC::X86Registers::r12 && registerID <= JSC::X86Registers::r15);
 #else
 #error RegisterAllocator does not define the valid register range for the current architecture.
 #endif
@@ -227,12 +206,14 @@ class RegisterAllocator {
         ASSERT(isValidRegister(registerID));
 #if CPU(ARM64)
         return registerID >= JSC::ARM64Registers::x0 && registerID <= JSC::ARM64Registers::x14;
-#elif CPU(ARM_THUMB2)
-        return (registerID >= JSC::ARMRegisters::r0 && registerID <= JSC::ARMRegisters::r3)
-            || registerID == JSC::ARMRegisters::r9;
 #elif CPU(X86_64)
+#if !OS(WINDOWS)
         return (registerID >= JSC::X86Registers::eax && registerID <= JSC::X86Registers::edx)
-            || (registerID >= JSC::X86Registers::esi && registerID <= JSC::X86Registers::r11);
+            || (registerID >= JSC::X86Registers::esi && registerID <= JSC::X86Registers::r10);
+#else
+        return (registerID >= JSC::X86Registers::eax && registerID <= JSC::X86Registers::edx)
+            || (registerID >= JSC::X86Registers::r8 && registerID <= JSC::X86Registers::r10);
+#endif
 #else
 #error RegisterAllocator does not define the valid caller saved register range for the current architecture.
 #endif