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Revert "Cherry-pick f442fbe222f3. rdar://126892345"
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This reverts commit ffd05ad.
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Mohsin Qureshi committed Apr 24, 2024
1 parent ab614cf commit 6fc6e82
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Showing 9 changed files with 25 additions and 118 deletions.
12 changes: 0 additions & 12 deletions Source/JavaScriptCore/assembler/MacroAssemblerARM64E.h
Original file line number Diff line number Diff line change
Expand Up @@ -65,12 +65,6 @@ class MacroAssemblerARM64E : public MacroAssemblerARM64 {

ALWAYS_INLINE void tagPtr(PtrTag tag, RegisterID target)
{
if (!tag) {
m_assembler.pacizb(target);
return;
}

RELEASE_ASSERT(Options::allowNonSPTagging());
auto tagGPR = getCachedDataTempRegisterIDAndInvalidate();
move(TrustedImm64(tag), tagGPR);
m_assembler.pacib(target, tagGPR);
Expand All @@ -82,17 +76,11 @@ class MacroAssemblerARM64E : public MacroAssemblerARM64 {
m_assembler.pacibsp();
return;
}
RELEASE_ASSERT(Options::allowNonSPTagging());
m_assembler.pacib(target, tag);
}

ALWAYS_INLINE void untagPtr(PtrTag tag, RegisterID target)
{
if (!tag) {
m_assembler.autizb(target);
return;
}

auto tagGPR = getCachedDataTempRegisterIDAndInvalidate();
move(TrustedImm64(tag), tagGPR);
m_assembler.autib(target, tagGPR);
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50 changes: 10 additions & 40 deletions Source/JavaScriptCore/dfg/DFGOSRExitCompilerCommon.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -252,16 +252,6 @@ void reifyInlinedCallFrames(CCallHelpers& jit, const OSRExitBase& exit)
ASSERT(JITCode::isBaselineCode(jit.baselineCodeBlock()->jitType()));
jit.storePtr(AssemblyHelpers::TrustedImmPtr(jit.baselineCodeBlock()), AssemblyHelpers::addressFor(CallFrameSlot::codeBlock));

GPRReg returnPCReg = GPRInfo::regT5;
#if CPU(ARM64E)
GPRReg signingTagReg = GPRInfo::regT2;
if (!Options::allowNonSPTagging()) {
returnPCReg = ARM64Registers::lr;
signingTagReg = MacroAssembler::stackPointerRegister;
// We could save/restore lr here but we don't need to because the LLInt/Baseline will load it from the stack before returning anyway.
}
#endif

const CodeOrigin* codeOrigin;
for (codeOrigin = &exit.m_codeOrigin; codeOrigin && codeOrigin->inlineCallFrame(); codeOrigin = codeOrigin->inlineCallFrame()->getCallerSkippingTailCalls()) {
InlineCallFrame* inlineCallFrame = codeOrigin->inlineCallFrame();
Expand All @@ -274,25 +264,15 @@ void reifyInlinedCallFrames(CCallHelpers& jit, const OSRExitBase& exit)

if (!trueCaller) {
ASSERT(inlineCallFrame->isTail());
jit.loadPtr(AssemblyHelpers::Address(GPRInfo::callFrameRegister, CallFrame::returnPCOffset()), returnPCReg);
jit.loadPtr(AssemblyHelpers::Address(GPRInfo::callFrameRegister, CallFrame::returnPCOffset()), GPRInfo::regT3);
#if CPU(ARM64E)
if (!Options::allowNonSPTagging()) {
JIT_COMMENT(jit, "lldb dynamic execution / posix signals could trash your stack"); // We don't have to worry about signals because they shouldn't fire in WebContent process in this window.
jit.move(MacroAssembler::stackPointerRegister, GPRInfo::regT4);
}

jit.addPtr(AssemblyHelpers::TrustedImm32(sizeof(CallerFrameAndPC)), GPRInfo::callFrameRegister, GPRInfo::regT2);
jit.untagPtr(GPRInfo::regT2, returnPCReg);
jit.validateUntaggedPtr(returnPCReg, GPRInfo::regT2);
jit.addPtr(AssemblyHelpers::TrustedImm32(inlineCallFrame->returnPCOffset() + sizeof(CPURegister)), GPRInfo::callFrameRegister, signingTagReg);
jit.tagPtr(signingTagReg, returnPCReg);

if (!Options::allowNonSPTagging()) {
JIT_COMMENT(jit, "lldb dynamic execution / posix signals are ok again");
jit.move(GPRInfo::regT4, MacroAssembler::stackPointerRegister);
}
jit.untagPtr(GPRInfo::regT2, GPRInfo::regT3);
jit.addPtr(AssemblyHelpers::TrustedImm32(inlineCallFrame->returnPCOffset() + sizeof(void*)), GPRInfo::callFrameRegister, GPRInfo::regT2);
jit.validateUntaggedPtr(GPRInfo::regT3, GPRInfo::regT4);
jit.tagPtr(GPRInfo::regT2, GPRInfo::regT3);
#endif
jit.storePtr(returnPCReg, AssemblyHelpers::addressForByteOffset(inlineCallFrame->returnPCOffset()));
jit.storePtr(GPRInfo::regT3, AssemblyHelpers::addressForByteOffset(inlineCallFrame->returnPCOffset()));
jit.loadPtr(AssemblyHelpers::Address(GPRInfo::callFrameRegister, CallFrame::callerFrameOffset()), GPRInfo::regT3);
callerFrameGPR = GPRInfo::regT3;
} else {
Expand All @@ -309,20 +289,10 @@ void reifyInlinedCallFrames(CCallHelpers& jit, const OSRExitBase& exit)
}

#if CPU(ARM64E)
if (!Options::allowNonSPTagging()) {
JIT_COMMENT(jit, "lldb dynamic execution / posix signals could trash your stack"); // We don't have to worry about signals because they shouldn't fire in WebContent process in this window.
jit.move(MacroAssembler::stackPointerRegister, GPRInfo::regT4);
}

jit.addPtr(AssemblyHelpers::TrustedImm32(inlineCallFrame->returnPCOffset() + sizeof(CPURegister)), GPRInfo::callFrameRegister, signingTagReg);
jit.move(AssemblyHelpers::TrustedImmPtr(jumpTarget.untaggedPtr()), returnPCReg);
jit.tagPtr(signingTagReg, returnPCReg);
jit.storePtr(returnPCReg, AssemblyHelpers::addressForByteOffset(inlineCallFrame->returnPCOffset()));

if (!Options::allowNonSPTagging()) {
JIT_COMMENT(jit, "lldb dynamic execution / posix signals are ok again");
jit.move(GPRInfo::regT4, MacroAssembler::stackPointerRegister);
}
jit.addPtr(AssemblyHelpers::TrustedImm32(inlineCallFrame->returnPCOffset() + sizeof(void*)), GPRInfo::callFrameRegister, GPRInfo::regT2);
jit.move(AssemblyHelpers::TrustedImmPtr(jumpTarget.untaggedPtr()), GPRInfo::regT4);
jit.tagPtr(GPRInfo::regT2, GPRInfo::regT4);
jit.storePtr(GPRInfo::regT4, AssemblyHelpers::addressForByteOffset(inlineCallFrame->returnPCOffset()));
#else
jit.storePtr(AssemblyHelpers::TrustedImmPtr(jumpTarget.untaggedPtr()), AssemblyHelpers::addressForByteOffset(inlineCallFrame->returnPCOffset()));
#endif
Expand Down
35 changes: 9 additions & 26 deletions Source/JavaScriptCore/jit/ThunkGenerators.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -626,9 +626,9 @@ MacroAssemblerCodeRef<JITThunkPtrTag> arityFixupGenerator(VM& vm)
jit.addPtr(JSInterfaceJIT::TrustedImm32(sizeof(CallerFrameAndPC)), GPRInfo::callFrameRegister, extraTemp);
jit.untagPtr(extraTemp, GPRInfo::regT3);
jit.validateUntaggedPtr(GPRInfo::regT3, extraTemp);
// We don't want to pass a tag register to pacib because it could get hijacked to make a PAC bypass gadget so we use pacizb instead.
static_assert(NoPtrTag == static_cast<PtrTag>(0));
jit.tagPtr(NoPtrTag, GPRInfo::regT3);
PtrTag tempReturnPCTag = static_cast<PtrTag>(random());
jit.move(JSInterfaceJIT::TrustedImmPtr(tempReturnPCTag), extraTemp);
jit.tagPtr(extraTemp, GPRInfo::regT3);
jit.storePtr(GPRInfo::regT3, JSInterfaceJIT::Address(GPRInfo::callFrameRegister, CallFrame::returnPCOffset()));
#endif
jit.move(JSInterfaceJIT::callFrameRegister, JSInterfaceJIT::regT3);
Expand Down Expand Up @@ -697,35 +697,18 @@ MacroAssemblerCodeRef<JITThunkPtrTag> arityFixupGenerator(VM& vm)

#if CPU(ARM64E)
jit.loadPtr(JSInterfaceJIT::Address(GPRInfo::callFrameRegister, CallFrame::returnPCOffset()), GPRInfo::regT3);
if (Options::allowNonSPTagging()) {
static_assert(NoPtrTag == static_cast<PtrTag>(0));
jit.untagPtr(NoPtrTag, GPRInfo::regT3);
jit.validateUntaggedPtr(GPRInfo::regT3, extraTemp);
jit.addPtr(JSInterfaceJIT::TrustedImm32(sizeof(CallerFrameAndPC)), GPRInfo::callFrameRegister, extraTemp);
jit.tagPtr(extraTemp, GPRInfo::regT3);
jit.storePtr(GPRInfo::regT3, JSInterfaceJIT::Address(GPRInfo::callFrameRegister, CallFrame::returnPCOffset()));
} else {
jit.move(ARM64Registers::lr, JSInterfaceJIT::argumentGPR0);
jit.move(ARM64Registers::sp, JSInterfaceJIT::argumentGPR1);
JIT_COMMENT(jit, "lldb dynamic execution / posix signals could trash your stack"); // We don't have to worry about signals because they shouldn't fire in WebContent process in this window.
jit.addPtr(JSInterfaceJIT::TrustedImm32(sizeof(CallerFrameAndPC)), GPRInfo::callFrameRegister, ARM64Registers::sp);
jit.move(GPRInfo::regT3, ARM64Registers::lr);
static_assert(NoPtrTag == static_cast<PtrTag>(0));
jit.untagPtr(NoPtrTag, ARM64Registers::lr);
jit.validateUntaggedPtr(ARM64Registers::lr, extraTemp);
jit.tagReturnAddress();
jit.storePtr(ARM64Registers::lr, JSInterfaceJIT::Address(GPRInfo::callFrameRegister, CallFrame::returnPCOffset()));
JIT_COMMENT(jit, "lldb dynamic execution / posix signals are ok again");
jit.move(JSInterfaceJIT::argumentGPR1, ARM64Registers::sp);
jit.move(JSInterfaceJIT::argumentGPR0, ARM64Registers::lr);
}
jit.move(JSInterfaceJIT::TrustedImmPtr(tempReturnPCTag), extraTemp);
jit.untagPtr(extraTemp, GPRInfo::regT3);
jit.validateUntaggedPtr(GPRInfo::regT3, extraTemp);
jit.addPtr(JSInterfaceJIT::TrustedImm32(sizeof(CallerFrameAndPC)), GPRInfo::callFrameRegister, extraTemp);
jit.tagPtr(extraTemp, GPRInfo::regT3);
jit.storePtr(GPRInfo::regT3, JSInterfaceJIT::Address(GPRInfo::callFrameRegister, CallFrame::returnPCOffset()));
#endif

#if CPU(X86_64)
jit.push(JSInterfaceJIT::regT4);
#endif
jit.ret();

#else // USE(JSVALUE64) section above, USE(JSVALUE32_64) section below.
jit.move(JSInterfaceJIT::callFrameRegister, JSInterfaceJIT::regT3);
jit.load32(JSInterfaceJIT::addressFor(CallFrameSlot::argumentCountIncludingThis), JSInterfaceJIT::argumentGPR2);
Expand Down
23 changes: 5 additions & 18 deletions Source/JavaScriptCore/llint/LLIntThunks.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -668,22 +668,9 @@ MacroAssemblerCodeRef<NativeToJITGatePtrTag> tagGateThunk(void* pointer)
{
CCallHelpers jit;

GPRReg signingTagReg = GPRInfo::regT3;
if (!Options::allowNonSPTagging()) {
JIT_COMMENT(jit, "lldb dynamic execution / posix signals could trash your stack"); // We don't have to worry about signals because they shouldn't fire in WebContent process in this window.
jit.move(MacroAssembler::stackPointerRegister, GPRInfo::regT3);
signingTagReg = MacroAssembler::stackPointerRegister;
}

jit.addPtr(CCallHelpers::TrustedImm32(sizeof(CallerFrameAndPC)), GPRInfo::callFrameRegister, signingTagReg);
jit.tagPtr(signingTagReg, ARM64Registers::lr);
jit.storePtr(ARM64Registers::lr, CCallHelpers::Address(GPRInfo::callFrameRegister, sizeof(CPURegister)));

if (!Options::allowNonSPTagging()) {
JIT_COMMENT(jit, "lldb dynamic execution / posix signals are ok again");
jit.move(GPRInfo::regT3, MacroAssembler::stackPointerRegister);
}

jit.addPtr(CCallHelpers::TrustedImm32(16), GPRInfo::callFrameRegister, GPRInfo::regT3);
jit.tagPtr(GPRInfo::regT3, ARM64Registers::lr);
jit.storePtr(ARM64Registers::lr, CCallHelpers::Address(GPRInfo::callFrameRegister, 8));
jit.move(CCallHelpers::TrustedImmPtr(pointer), GPRInfo::regT3);
jit.farJump(GPRInfo::regT3, OperationPtrTag);

Expand All @@ -695,8 +682,8 @@ MacroAssemblerCodeRef<NativeToJITGatePtrTag> untagGateThunk(void* pointer)
{
CCallHelpers jit;

jit.loadPtr(CCallHelpers::Address(GPRInfo::callFrameRegister, sizeof(CPURegister)), ARM64Registers::lr);
jit.addPtr(CCallHelpers::TrustedImm32(sizeof(CallerFrameAndPC)), GPRInfo::callFrameRegister, GPRInfo::regT3);
jit.loadPtr(CCallHelpers::Address(GPRInfo::callFrameRegister, 8), ARM64Registers::lr);
jit.addPtr(CCallHelpers::TrustedImm32(16), GPRInfo::callFrameRegister, GPRInfo::regT3);
jit.untagPtr(GPRInfo::regT3, ARM64Registers::lr);
jit.validateUntaggedPtr(ARM64Registers::lr, GPRInfo::regT3);
jit.move(CCallHelpers::TrustedImmPtr(pointer), GPRInfo::regT3);
Expand Down
10 changes: 0 additions & 10 deletions Source/JavaScriptCore/runtime/Options.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -898,11 +898,6 @@ void Options::notifyOptionsChanged()
}
#endif

// We can't use our pacibsp system while using posix signals because the signal handler could trash our stack during reifyInlinedCallFrames.
// If we have JITCage we don't need to restrict ourselves to pacibsp.
if (!Options::useMachForExceptions() || Options::useJITCage())
Options::allowNonSPTagging() = true;

if (!Options::useWasmFaultSignalHandler())
Options::useWebAssemblyFastMemory() = false;

Expand Down Expand Up @@ -1273,11 +1268,6 @@ void Options::assertOptionsAreCoherent()
coherent = false;
dataLogLn("Bytecode profiler is not concurrent JIT safe.");
}
if (!allowNonSPTagging() && !useMachForExceptions()) {
coherent = false;
dataLog("INCOHERENT OPTIONS: can't restrict pointer tagging to pacibsp and use posix signals");
}

if (!coherent)
CRASH();
}
Expand Down
1 change: 0 additions & 1 deletion Source/JavaScriptCore/runtime/OptionsList.h
Original file line number Diff line number Diff line change
Expand Up @@ -476,7 +476,6 @@ bool hasCapacityToUseLargeGigacage();
v(Bool, usePollingTraps, false, Normal, "use polling (instead of signalling) VM traps") \
\
v(Bool, useMachForExceptions, true, Normal, "Use mach exceptions rather than signals to handle faults and pass thread messages. (This does nothing on platforms without mach)") \
v(Bool, allowNonSPTagging, true, Normal, "allow use of the pacib instruction instead of just pacibsp (This can break lldb/posix signals as it puts live data below SP)") \
\
v(Bool, useICStats, false, Normal, nullptr) \
\
Expand Down
2 changes: 1 addition & 1 deletion Source/WTF/wtf/PtrTag.h
Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@ enum class PACKeyType {
FOR_EACH_ADDITIONAL_WTF_PTRTAG(v) \

enum PtrTag : uintptr_t {
NoPtrTag = 0, // Note: We use the 0 tag for temporarily holding the return PC during JSC's arity fixup.
NoPtrTag,
CFunctionPtrTag,
};

Expand Down
6 changes: 0 additions & 6 deletions Source/WebKit/WebProcess/WebProcess.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -362,12 +362,6 @@ void WebProcess::initializeProcess(const AuxiliaryProcessInitializationParameter
{
WTF::setProcessPrivileges({ });

{
JSC::Options::AllowUnfinalizedAccessScope scope;
JSC::Options::allowNonSPTagging() = false;
JSC::Options::notifyOptionsChanged();
}

MessagePortChannelProvider::setSharedProvider(WebMessagePortChannelProvider::singleton());

platformInitializeProcess(parameters);
Expand Down
4 changes: 0 additions & 4 deletions Tools/Scripts/run-jsc-stress-tests
Original file line number Diff line number Diff line change
Expand Up @@ -1130,7 +1130,6 @@ BASE_MODES = [
"misc-ftl-no-cjit",
[
"--useDataICInFTL=true",
"--allowNonSPTagging=false",
] +
FTL_OPTIONS +
NO_CJIT_OPTIONS
Expand Down Expand Up @@ -1158,7 +1157,6 @@ BASE_MODES = [
"--airForceIRCAllocator=true",
"--useDataICInFTL=true",
"--forceUnlinkedDFG=true",
"--allowNonSPTagging=false",
] +
FTL_OPTIONS +
NO_CJIT_OPTIONS
Expand Down Expand Up @@ -1220,7 +1218,6 @@ BASE_MODES = [
"--useRandomizingExecutableIslandAllocation=true",
"--forcePolyProto=true",
"--useDataICInFTL=true",
"--allowNonSPTagging=false",
] +
FTL_OPTIONS +
EAGER_OPTIONS +
Expand Down Expand Up @@ -1284,7 +1281,6 @@ BASE_MODES = [
"ftl-no-cjit-no-access-inlining",
[
"--useAccessInlining=false",
"--allowNonSPTagging=false",
] +
FTL_OPTIONS +
NO_CJIT_OPTIONS
Expand Down

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