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[JSC] Ensure using CLoop for x86 (32bit)
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https://bugs.webkit.org/show_bug.cgi?id=274452
rdar://128449662

Reviewed by Ross Kirsling.

This patch ensures that CLoop is enabled on x86 (32bit) and dropping asm LLInt support.

* Source/JavaScriptCore/CMakeLists.txt:
* Source/JavaScriptCore/llint/LLIntOfflineAsmConfig.h:
* Source/JavaScriptCore/llint/LowLevelInterpreter.asm:
* Source/JavaScriptCore/llint/LowLevelInterpreter32_64.asm:
* Source/JavaScriptCore/offlineasm/backends.rb:
* Source/JavaScriptCore/offlineasm/x86.rb:
* Source/cmake/WebKitFeatures.cmake:

Canonical link: https://commits.webkit.org/279048@main
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Constellation committed May 21, 2024
1 parent 1a8d6ca commit 8e3653b
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Showing 7 changed files with 21 additions and 181 deletions.
8 changes: 2 additions & 6 deletions Source/JavaScriptCore/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -268,9 +268,7 @@ list(APPEND JavaScriptCore_HEADERS
)

if (WIN32)
if (WTF_CPU_X86)
set(OFFLINE_ASM_BACKEND "X86_WIN")
elseif (WTF_CPU_X86_64)
if (WTF_CPU_X86_64)
set(OFFLINE_ASM_BACKEND "X86_64_WIN")
endif ()

Expand All @@ -280,9 +278,7 @@ if (WIN32)
endif ()
endif ()
else ()
if (WTF_CPU_X86)
set(OFFLINE_ASM_BACKEND "X86")
elseif (WTF_CPU_X86_64)
if (WTF_CPU_X86_64)
set(OFFLINE_ASM_BACKEND "X86_64")
elseif (WTF_CPU_ARM64)
set(OFFLINE_ASM_BACKEND "ARM64")
Expand Down
14 changes: 0 additions & 14 deletions Source/JavaScriptCore/llint/LLIntOfflineAsmConfig.h
Original file line number Diff line number Diff line change
Expand Up @@ -38,8 +38,6 @@
#define OFFLINE_ASM_C_LOOP 0
#define OFFLINE_ASM_C_LOOP_WIN 1
#endif
#define OFFLINE_ASM_X86 0
#define OFFLINE_ASM_X86_WIN 0
#define OFFLINE_ASM_ARMv7 0
#define OFFLINE_ASM_ARM64 0
#define OFFLINE_ASM_ARM64E 0
Expand All @@ -54,18 +52,6 @@
#define OFFLINE_ASM_C_LOOP 0
#define OFFLINE_ASM_C_LOOP_WIN 0

#if CPU(X86) && !COMPILER(MSVC)
#define OFFLINE_ASM_X86 1
#else
#define OFFLINE_ASM_X86 0
#endif

#if CPU(X86) && COMPILER(MSVC)
#define OFFLINE_ASM_X86_WIN 1
#else
#define OFFLINE_ASM_X86_WIN 0
#endif

#ifdef __ARM_ARCH_7K__
#define OFFLINE_ASM_ARMv7k 1
#else
Expand Down
70 changes: 9 additions & 61 deletions Source/JavaScriptCore/llint/LowLevelInterpreter.asm
Original file line number Diff line number Diff line change
Expand Up @@ -83,13 +83,6 @@
#
# - a0, a1, a2 and a3 are the platform's customary argument registers, and
# thus are pairwise distinct registers. Be mindful that:
# + On X86, there are no argument registers. a0 and a1 are edx and
# ecx following the fastcall convention, but you should still use the stack
# to pass your arguments. The cCall2 and cCall4 macros do this for you.
# + On X86_64_WIN, you should allocate space on the stack for the arguments,
# and the return convention is weird for > 8 bytes types. The only place we
# use > 8 bytes return values is on a cCall, and cCall2 and cCall4 handle
# this for you.
#
# - The only registers guaranteed to be caller-saved are r0, r1, a0, a1 and a2, and
# you should be mindful of that in functions that are called directly from C.
Expand All @@ -116,11 +109,10 @@
# work if swapped with e.g. t3, while code using r0 (or r1) should not. There
# *may* be legacy code relying on this.
#
# - On all platforms other than X86, t0 can only be a0 and t2 can only be a2.
# - On all platforms, t0 can only be a0 and t2 can only be a2.
#
# - On all platforms other than X86 and X86_64, a2 is not a return register.
# a2 is r0 on X86 (because we have so few registers) and r1 on X86_64 (because
# the ABI enforces it).
# - On all platforms other than X86_64, a2 is not a return register.
# a2 is r1 on X86_64 (because the ABI enforces it).
#
# The following floating-point registers are available:
#
Expand Down Expand Up @@ -770,8 +762,6 @@ if C_LOOP or C_LOOP_WIN or ARM64 or ARM64E or X86_64 or X86_64_WIN or RISCV64
const CalleeSaveRegisterCount = 0
elsif ARMv7
const CalleeSaveRegisterCount = 5 + 2 * 2 // 5 32-bit GPRs + 2 64-bit FPRs
elsif X86 or X86_WIN
const CalleeSaveRegisterCount = 3
end

const CalleeRegisterSaveSize = CalleeSaveRegisterCount * MachineRegisterSize
Expand All @@ -789,14 +779,6 @@ macro pushCalleeSaves()
elsif ARMv7
emit "vpush.64 {d14, d15}"
emit "push {r4-r6, r8-r9}"
elsif X86
emit "push %esi"
emit "push %edi"
emit "push %ebx"
elsif X86_WIN
emit "push esi"
emit "push edi"
emit "push ebx"
end
end

Expand All @@ -805,22 +787,14 @@ macro popCalleeSaves()
elsif ARMv7
emit "pop {r4-r6, r8-r9}"
emit "vpop.64 {d14, d15}"
elsif X86
emit "pop %ebx"
emit "pop %edi"
emit "pop %esi"
elsif X86_WIN
emit "pop ebx"
emit "pop edi"
emit "pop esi"
end
end

macro preserveCallerPCAndCFR()
if C_LOOP or C_LOOP_WIN or ARMv7
push lr
push cfr
elsif X86 or X86_WIN or X86_64 or X86_64_WIN
elsif X86_64 or X86_64_WIN
push cfr
elsif ARM64 or ARM64E or RISCV64
push cfr, lr
Expand All @@ -835,7 +809,7 @@ macro restoreCallerPCAndCFR()
if C_LOOP or C_LOOP_WIN or ARMv7
pop cfr
pop lr
elsif X86 or X86_WIN or X86_64 or X86_64_WIN
elsif X86_64 or X86_64_WIN
pop cfr
elsif ARM64 or ARM64E or RISCV64
pop lr, cfr
Expand All @@ -852,8 +826,6 @@ macro preserveCalleeSavesUsedByLLInt()
elsif ARM64 or ARM64E
storepairq csr8, csr9, -16[cfr]
storepairq csr6, csr7, -32[cfr]
elsif X86
elsif X86_WIN
elsif X86_64 or X86_64_WIN
storep csr4, -8[cfr]
storep csr3, -16[cfr]
Expand All @@ -876,8 +848,6 @@ macro restoreCalleeSavesUsedByLLInt()
elsif ARM64 or ARM64E
loadpairq -32[cfr], csr6, csr7
loadpairq -16[cfr], csr8, csr9
elsif X86
elsif X86_WIN
elsif X86_64 or X86_64_WIN
loadp -32[cfr], csr1
loadp -24[cfr], csr2
Expand Down Expand Up @@ -1017,7 +987,7 @@ macro preserveReturnAddressAfterCall(destinationRegister)
if C_LOOP or C_LOOP_WIN or ARMv7 or ARM64 or ARM64E or RISCV64
# In C_LOOP or C_LOOP_WIN case, we're only preserving the bytecode vPC.
move lr, destinationRegister
elsif X86 or X86_WIN or X86_64 or X86_64_WIN
elsif X86_64 or X86_64_WIN
pop destinationRegister
else
error
Expand All @@ -1026,7 +996,7 @@ end

macro functionPrologue()
tagReturnAddress sp
if X86 or X86_WIN or X86_64 or X86_64_WIN
if X86_64 or X86_64_WIN
push cfr
elsif ARM64 or ARM64E or RISCV64
push cfr, lr
Expand All @@ -1038,7 +1008,7 @@ macro functionPrologue()
end

macro functionEpilogue()
if X86 or X86_WIN or X86_64 or X86_64_WIN
if X86_64 or X86_64_WIN
pop cfr
elsif ARM64 or ARM64E or RISCV64
pop lr, cfr
Expand Down Expand Up @@ -1780,15 +1750,6 @@ if not (C_LOOP or C_LOOP_WIN)
global _sanitizeStackForVMImpl
_sanitizeStackForVMImpl:
tagReturnAddress sp
# We need three non-aliased caller-save registers. We are guaranteed
# this for a0, a1 and a2 on all architectures. Beware also that
# offlineasm might use temporary registers when lowering complex
# instructions on some platforms, which might be callee-save. To avoid
# this, we use the simplest instructions so we never need a temporary
# and hence don't clobber any callee-save registers.
if X86 or X86_WIN
loadp 4[sp], a0
end
const address = a1
const scratch = a2

Expand Down Expand Up @@ -1834,10 +1795,6 @@ if not (C_LOOP or C_LOOP_WIN)
global _vmEntryRecord
_vmEntryRecord:
tagReturnAddress sp
if X86 or X86_WIN
loadp 4[sp], a0
end

vmEntryRecord(a0, r0)
ret
end
Expand Down Expand Up @@ -1919,7 +1876,7 @@ if C_LOOP or C_LOOP_WIN
crash()
else
macro initPCRelative(kind, pcBase)
if X86_64 or X86_64_WIN or X86 or X86_WIN
if X86_64 or X86_64_WIN
call _%kind%_relativePCBase
_%kind%_relativePCBase:
pop pcBase
Expand All @@ -1938,10 +1895,6 @@ else
leap (label - _%kind%_relativePCBase)[t3], t4
move index, t5
storep t4, [map, t5, 8]
elsif X86 or X86_WIN
leap (label - _%kind%_relativePCBase)[t3], t4
move index, t5
storep t4, [map, t5, 4]
elsif ARM64 or RISCV64
pcrtoaddr label, t3
move index, t4
Expand Down Expand Up @@ -1984,11 +1937,6 @@ macro entry(kind, initialize)
_%kind%_entry:
functionPrologue()
pushCalleeSaves()
if X86 or X86_WIN
loadp 20[sp], a0
loadp 24[sp], a1
loadp 28[sp], a2
end

initPCRelative(kind, t3)

Expand Down
63 changes: 3 additions & 60 deletions Source/JavaScriptCore/llint/LowLevelInterpreter32_64.asm
Original file line number Diff line number Diff line change
Expand Up @@ -148,12 +148,6 @@ macro cCall2(function)
cloopCallSlowPath function, a0, a1
elsif ARMv7
call function
elsif X86 or X86_WIN
subp 8, sp
push a1
push a0
call function
addp 16, sp
else
error
end
Expand All @@ -172,13 +166,6 @@ macro cCall3(function)
cloopCallSlowPath3 function, a0, a1, a2
elsif ARMv7
call function
elsif X86 or X86_WIN
subp 4, sp
push a2
push a1
push a0
call function
addp 16, sp
else
error
end
Expand All @@ -189,13 +176,6 @@ macro cCall4(function)
cloopCallSlowPath4 function, a0, a1, a2, a3
elsif ARMv7
call function
elsif X86 or X86_WIN
push a3
push a2
push a1
push a0
call function
addp 16, sp
else
error
end
Expand Down Expand Up @@ -225,13 +205,6 @@ macro doVMEntry(makeCall)
functionPrologue()
pushCalleeSaves()

# x86 needs to load arguments from the stack
if X86 or X86_WIN
loadp 16[cfr], a2
loadp 12[cfr], a1
loadp 8[cfr], a0
end

const entry = a0
const vm = a1
const protoCallFrame = a2
Expand All @@ -254,11 +227,7 @@ macro doVMEntry(makeCall)
storep t4, VMEntryRecord::m_prevTopEntryFrame[sp]

# Align stack pointer
if X86_WIN
addp CallFrameAlignSlots * SlotSize, sp, t3
andp ~StackAlignmentMask, t3
subp t3, CallFrameAlignSlots * SlotSize, sp
elsif ARMv7
if ARMv7
addp CallFrameAlignSlots * SlotSize, sp, t3
clrbp t3, StackAlignmentMask, t3
subp t3, CallFrameAlignSlots * SlotSize, t3
Expand Down Expand Up @@ -419,16 +388,6 @@ macro makeHostFunctionCall(entry, protoCallFrame, temp1, temp2)
move sp, a1
storep lr, PtrSize[sp]
cloopCallNative temp1
elsif X86 or X86_WIN
# Put callee frame pointer on stack as arg1, also put it in ecx for "fastcall" targets
move 0, temp2
move temp2, 4[sp] # put 0 in ReturnPC
move sp, a1 # a1 is edx
loadp ProtoCallFrame::globalObject[protoCallFrame], a0
push a1
push a0
call temp1
addp 8, sp
else
loadp ProtoCallFrame::globalObject[protoCallFrame], a0
move sp, a1
Expand Down Expand Up @@ -2638,12 +2597,7 @@ macro nativeCallTrampoline(executableOffsetToFunction)
functionPrologue()
storep 0, CodeBlock[cfr]

if X86 or X86_WIN
subp 8, sp # align stack pointer
storep cfr, [sp]
else
subp 8, sp # align stack pointer
end
subp 8, sp # align stack pointer

loadp Callee + PayloadOffset[cfr], a0
loadp JSFunction::m_executableOrRareData[a0], a2
Expand Down Expand Up @@ -2674,9 +2628,6 @@ macro nativeCallTrampoline(executableOffsetToFunction)
ret

.handleException:
if X86 or X86_WIN
subp 8, sp # align stack pointer
end
storep cfr, VM::topCallFrame[t3]
jmp _llint_throw_from_slow_path_trampoline
end
Expand All @@ -2687,12 +2638,7 @@ macro internalFunctionCallTrampoline(offsetOfFunction)
storep 0, CodeBlock[cfr]

// Callee is still in t1 for code below
if X86 or X86_WIN
subp 8, sp # align stack pointer
storep cfr, [sp]
else
subp 8, sp # align stack pointer
end
subp 8, sp # align stack pointer

loadp Callee + PayloadOffset[cfr], a2
loadp InternalFunction::m_globalObject[a2], a0
Expand All @@ -2719,9 +2665,6 @@ macro internalFunctionCallTrampoline(offsetOfFunction)
ret

.handleException:
if X86 or X86_WIN
subp 8, sp # align stack pointer
end
storep cfr, VM::topCallFrame[t3]
jmp _llint_throw_from_slow_path_trampoline
end
Expand Down
4 changes: 0 additions & 4 deletions Source/JavaScriptCore/offlineasm/backends.rb
Original file line number Diff line number Diff line change
Expand Up @@ -36,8 +36,6 @@

BACKENDS =
[
"X86",
"X86_WIN",
"X86_64",
"X86_64_WIN",
"ARMv7",
Expand All @@ -55,8 +53,6 @@
# the future while not actually supporting the backend yet.
WORKING_BACKENDS =
[
"X86",
"X86_WIN",
"X86_64",
"X86_64_WIN",
"ARMv7",
Expand Down
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