New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. Weβll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[SIMD] Intel support for load and store operations and fix operation shuffle #7440
[SIMD] Intel support for load and store operations and fix operation shuffle #7440
Conversation
EWS run on previous version of this PR (hash c0ff6b0) |
c0ff6b0
to
874b136
Compare
EWS run on previous version of this PR (hash 874b136) |
874b136
to
a42739d
Compare
EWS run on previous version of this PR (hash a42739d) |
a42739d
to
a2b6fc2
Compare
EWS run on previous version of this PR (hash a2b6fc2) |
a2b6fc2
to
97f7ec4
Compare
EWS run on previous version of this PR (hash 97f7ec4) |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Commented
97f7ec4
to
7326753
Compare
EWS run on previous version of this PR (hash 7326753) |
7326753
to
0370463
Compare
EWS run on previous version of this PR (hash 0370463) |
0370463
to
64db9e6
Compare
EWS run on previous version of this PR (hash 64db9e6) |
64db9e6
to
fbc87be
Compare
fbc87be
to
71f98de
Compare
EWS run on previous version of this PR (hash 71f98de)
|
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
r=me with comments
71f98de
to
cd8cc14
Compare
EWS run on previous version of this PR (hash cd8cc14)
|
cd8cc14
to
4c5a152
Compare
EWS run on current version of this PR (hash 4c5a152)
|
β¦shuffle https://bugs.webkit.org/show_bug.cgi?id=249073 rdar://103214919 Reviewed by Yusuke Suzuki. This patch achieves four tasks: 1. Add load and store operations for WASM SIMD on Intel. https://github.com/WebAssembly/simd/blob/main/proposals/simd/SIMD.md#load-and-store 2. And fix WASM SIMD operation i8x16.shuffle. 3. Fix instruction encoding in X86Assember.h according to the new conventions. 4. Define and use AVX functions for operations replace_lane, extract_lane, and splat. * Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h: (JSC::MacroAssemblerX86_64::vectorReplaceLaneAVX): (JSC::MacroAssemblerX86_64::vectorReplaceLane): (JSC::MacroAssemblerX86_64::vectorExtractLane): (JSC::MacroAssemblerX86_64::vectorExtractLaneAVX): (JSC::MacroAssemblerX86_64::vectorAbs): (JSC::MacroAssemblerX86_64::vectorTruncSatUnsignedFloat64): (JSC::MacroAssemblerX86_64::vectorExtendHigh): (JSC::MacroAssemblerX86_64::vectorSplatAVX): (JSC::MacroAssemblerX86_64::vectorSplat): (JSC::MacroAssemblerX86_64::vectorLoad8Splat): (JSC::MacroAssemblerX86_64::vectorLoad16Splat): (JSC::MacroAssemblerX86_64::vectorLoad32Splat): (JSC::MacroAssemblerX86_64::vectorLoad64Splat): (JSC::MacroAssemblerX86_64::vectorLoad8Lane): (JSC::MacroAssemblerX86_64::vectorLoad16Lane): (JSC::MacroAssemblerX86_64::vectorLoad32Lane): (JSC::MacroAssemblerX86_64::vectorLoad64Lane): (JSC::MacroAssemblerX86_64::vectorStore8Lane): (JSC::MacroAssemblerX86_64::vectorStore16Lane): (JSC::MacroAssemblerX86_64::vectorStore32Lane): (JSC::MacroAssemblerX86_64::vectorStore64Lane): * Source/JavaScriptCore/assembler/X86Assembler.h: (JSC::X86Assembler::pinsrb_i8rr): (JSC::X86Assembler::pinsrw_i8rr): (JSC::X86Assembler::pinsrd_i8rr): (JSC::X86Assembler::pinsrq_i8rr): (JSC::X86Assembler::insertps_i8rr): (JSC::X86Assembler::pextrb_i8rr): (JSC::X86Assembler::pextrw_i8rr): (JSC::X86Assembler::pextrd_i8rr): (JSC::X86Assembler::pextrq_i8rr): (JSC::X86Assembler::pshufd_i8rr): (JSC::X86Assembler::pshuflw_i8rr): (JSC::X86Assembler::shufps_i8rr): (JSC::X86Assembler::shufpd_i8rr): (JSC::X86Assembler::pblendw_rr): (JSC::X86Assembler::packusdw_rr): (JSC::X86Assembler::pmovsxbw): (JSC::X86Assembler::pmovzxbw): (JSC::X86Assembler::pmovsxwd): (JSC::X86Assembler::pmovzxwd): (JSC::X86Assembler::pmovsxdq): (JSC::X86Assembler::pmovzxdq): (JSC::X86Assembler::vpinsrb_i8mrr): (JSC::X86Assembler::vpinsrb_i8rrr): (JSC::X86Assembler::vpinsrw_i8mrr): (JSC::X86Assembler::vpinsrw_i8rrr): (JSC::X86Assembler::vpinsrd_i8mrr): (JSC::X86Assembler::vpinsrd_i8rrr): (JSC::X86Assembler::vpinsrq_i8mrr): (JSC::X86Assembler::vpinsrq_i8rrr): (JSC::X86Assembler::vinsertps_i8rrr): (JSC::X86Assembler::vmovddup_rr): (JSC::X86Assembler::vmovddup_mr): (JSC::X86Assembler::vmovapd_rr): (JSC::X86Assembler::vbroadcastss_mr): (JSC::X86Assembler::vmovq_rr): (JSC::X86Assembler::vpunpcklqdq_rrr): (JSC::X86Assembler::vunpcklpd_rrr): (JSC::X86Assembler::vpextrb_i8rr): (JSC::X86Assembler::vpextrb_i8rm): (JSC::X86Assembler::vpextrw_i8rr): (JSC::X86Assembler::vpextrw_i8rm): (JSC::X86Assembler::vpextrd_i8rr): (JSC::X86Assembler::vpextrd_i8rm): (JSC::X86Assembler::vpextrq_i8rr): (JSC::X86Assembler::vpextrq_i8rm): (JSC::X86Assembler::vshufps_i8rrr): (JSC::X86Assembler::vshufpd_i8rrr): (JSC::X86Assembler::vpshuflw_i8rr): (JSC::X86Assembler::vpshufd_i8rr): (JSC::X86Assembler::vpackusdw_rrr): (JSC::X86Assembler::vpmovsxbw_rr): (JSC::X86Assembler::vpmovzxbw_rr): (JSC::X86Assembler::vpmovsxwd_rr): (JSC::X86Assembler::vpmovzxwd_rr): (JSC::X86Assembler::vpmovsxdq_rr): (JSC::X86Assembler::vpmovzxdq_rr): (JSC::X86Assembler::vmovaps_rr): (JSC::X86Assembler::vmovshdup_rr): (JSC::X86Assembler::vmovhlps_rrr): (JSC::X86Assembler::vmovsd_rrr): (JSC::X86Assembler::vpblendw_i8rrr): (JSC::X86Assembler::X86InstructionFormatter::SingleInstructionBufferWriter::memoryModRM): (JSC::X86Assembler::pinsrb_rr): Deleted. (JSC::X86Assembler::pinsrw_rr): Deleted. (JSC::X86Assembler::pinsrd_rr): Deleted. (JSC::X86Assembler::pinsrq_rr): Deleted. (JSC::X86Assembler::insertps_rr): Deleted. (JSC::X86Assembler::pextrb_rr): Deleted. (JSC::X86Assembler::pextrw_rr): Deleted. (JSC::X86Assembler::pextrd_rr): Deleted. (JSC::X86Assembler::pextrq_rr): Deleted. (JSC::X86Assembler::pshufd_rr): Deleted. (JSC::X86Assembler::pshuflw_rr): Deleted. (JSC::X86Assembler::shufps_rr): Deleted. (JSC::X86Assembler::shufpd_rr): Deleted. (JSC::X86Assembler::vpextrb_rr): Deleted. (JSC::X86Assembler::vpextrw_rr): Deleted. (JSC::X86Assembler::vpextrd_rr): Deleted. (JSC::X86Assembler::vpextrq_rr): Deleted. (JSC::X86Assembler::vshufps_rrr): Deleted. * Source/JavaScriptCore/b3/air/AirOpcode.opcodes: * Source/JavaScriptCore/wasm/WasmAirIRGenerator.cpp: (JSC::Wasm::AirIRGenerator::addSIMDSwizzleHelperX86): (JSC::Wasm::AirIRGenerator::addSIMDV_VV): (JSC::Wasm::AirIRGenerator::addSIMDShuffle): (JSC::Wasm::AirIRGenerator::addSIMDLoadSplat): (JSC::Wasm::AirIRGenerator::addSIMDSwizzle): Deleted. Canonical link: https://commits.webkit.org/257818@main
4c5a152
to
0def43d
Compare
Committed 257818@main (0def43d): https://commits.webkit.org/257818@main Reviewed commits have been landed. Closing PR #7440 and removing active labels. |
0def43d
4c5a152
π π§ͺ winπ§ͺ ios-wk2π§ͺ api-macπ§ͺ gtk-wk2π§ͺ api-iosπ§ͺ mac-wk1π§ͺ mac-wk2π watch-sim