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Implementation of Number-theoretic transform(NTT) algorithm on FPGA; 快速数论变换(NTT)的FPGA实现,基为2,有两个并行的蝶形单元

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XBQ314/A-Number-Theoretic-Transform-Accelerator-with-Two-Parallel-Simplified-Butterfly-Units

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A Number Theoretic Transform Accelerator with Two Parallel Simplified Butterfly Units

this repository is the source code of this paper: http://dx.doi.org/10.1117/12.2642606

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  • include:Defined some macros
  • modelsim:Contains simulation scripts and waveform files that can be run on modelsim
  • pattern:Contains all the test files
  • cfmm: The C-model of the conflict free memory mapping scheme. can exec through the command "make run"
  • vsrc: The verlilog source files are contained in this directory

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Implementation of Number-theoretic transform(NTT) algorithm on FPGA; 快速数论变换(NTT)的FPGA实现,基为2,有两个并行的蝶形单元

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