canfd:Fix missing TX canfd packet in loopback

There is an issue during synchronization in CANFD2.0(For ES1) when sending
multibuffers (Triggering TRR at a single time with having all data ready)
in loopback mode. Core is not able to send all messages. it is sending previous
ID instead of the new one in random iterations.

Hence instead of triggering all buffers at a time, Send one by one message like
sequential buffer sending. This can't be fixed in ES1.

Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>

Acked-for-series: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>

XilinxProcessorIPLib/drivers/canfd/src/xcanfd.c

@@ -75,6 +75,8 @@
 * 2.2   sn   06/11/19 Inactivating Mailbox RX buffers based on requirement.
 * 2.3	sne  21/11/19 Used correct macro to access RX FIFO1 buffer.
 * 2.3	sne  11/18/19 Fix for missing RX can packets on CANFD2.0.
+* 2.3	sne  11/29/19 Fix for missing TX canfd packet while sending multiple packets
+*		      by using multi buffer in loopback mode, CR# 1048366.
 *
 * </pre>
 ******************************************************************************/
@@ -1523,6 +1525,9 @@ int XCanFd_Send_Queue(XCanFd *InstancePtr)
 {
 
 	u32 TrrVal;
+#ifdef versal
+	u32 BufferNumber;
+#endif
 
 	Xil_AssertNonvoid(InstancePtr != NULL);
 	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
@@ -1533,7 +1538,20 @@ int XCanFd_Send_Queue(XCanFd *InstancePtr)
 	 * XCanFd_Addto_Queue()
 	 */
 	TrrVal = InstancePtr->MultiBuffTrr;
-
+#ifdef versal
+	if(XGetPSVersion_Info() == (u32)0x10 && (!InstancePtr->CanFdConfig.IsPl)) {
+		for (BufferNumber = 0;BufferNumber < MAX_BUFFER_VAL;
+		     BufferNumber++) {
+			XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress,
+					XCANFD_TRR_OFFSET, (TrrVal &
+					(1<<BufferNumber)));
+		}
+	} else
+#endif
+	{
+		XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress,
+				XCANFD_TRR_OFFSET, TrrVal);
+	}
 	XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_TRR_OFFSET, TrrVal);
 	InstancePtr->GlobalTrrValue = TRR_INIT_VAL;
 	InstancePtr->GlobalTrrMask  = TRR_MASK_INIT_VAL;

XilinxProcessorIPLib/drivers/canfd/src/xcanfd.h

@@ -266,6 +266,8 @@ exclusion
 *		      and CONTROL_STATUS_3.
 * 2.3	sne  21/11/19 Used correct macro to access RX FIFO1 buffer.
 * 2.3	sne  11/18/19 Fix for missing RX can packets on CANFD2.0.
+* 2.3   sne  11/29/19 Fix for missing TX canfd packet while sending multiple packets
+*                     by using multi buffer in loopback mode, CR# 1048366.
 *
 * </pre>
 *
@@ -279,7 +281,7 @@ extern "C" {
 #endif
 
 /***************************** Include Files *********************************/
-
+#include "xplatform_info.h"
 #include "xstatus.h"
 #include "xcanfd_hw.h"
 
@@ -348,6 +350,7 @@ typedef struct {
 	u32 Rx_Mode;			/**< 1-Mailbox 0-sequential */
 	u32 NumofRxMbBuf;	/**< Number of RxBuffers */
 	u32 NumofTxBuf;         /**< Number of TxBuffers */
+	u32 IsPl;		/**< IsPl, 1= AXI CANFD instance,0= CANFD instance */
 } XCanFd_Config;
 
 /*****************************************************************************/

XilinxProcessorIPLib/drivers/canfd/src/xcanfd_g.c

@@ -39,6 +39,7 @@ XCanFd_Config XCanFd_ConfigTable[] =
 		XPAR_CANFD_0_BASEADDR,
 		XPAR_CANFD_0_RX_MODE,
 		XPAR_CANFD_0_NUM_OF_RX_MB_BUF,
-		XPAR_CANFD_0_NUM_OF_TX_BUF
+		XPAR_CANFD_0_NUM_OF_TX_BUF,
+		XPAR_CANFD_0_IS_PL
 	}
 };