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I can build petalinux image with app, please reference this link Xilinx/kria-apps-firmware#2 (comment)
but i found the dmesg with error when use the New FPGA Firmware(app) I build.
My question is - Can I use the DTG to generate the dtsi file from defect-detection PL design (.xsa file)? or I need to manual modify the dtsi file generated from DTG?
Note: the /home/tonyho/workspace/kv260-vitis/tony-firmware/save0307-2021.1/kv260_ispMipiRx_vmixDP_save0307-2021.1.xsa is the file i build from kv260-vitis and branch = release-2021.1
The text was updated successfully, but these errors were encountered:
Hi,
how to build defect-detection app from source?
I used below source and revision.
I also try below combintaion, both failed.
I can build petalinux image with app, please reference this link Xilinx/kria-apps-firmware#2 (comment)
but i found the dmesg with error when use the New FPGA Firmware(app) I build.
I think this issue is caused by the .dtsi file - tool auto generated.
My question is - Can I use the DTG to generate the dtsi file from defect-detection PL design (.xsa file)? or I need to manual modify the dtsi file generated from DTG?
I used below command to auto generate .dtsi file, I reference this link https://xilinx.github.io/kria-apps-docs/creating_applications/1.0/build/html/docs/creating_applications_dtsi_dtbo_generation.html
Note: the /home/tonyho/workspace/kv260-vitis/tony-firmware/save0307-2021.1/kv260_ispMipiRx_vmixDP_save0307-2021.1.xsa is the file i build from kv260-vitis and branch = release-2021.1
The text was updated successfully, but these errors were encountered: